Banner Electrical Verification The invisible bottleneck in IC design updated 1
WP_Term Object
(
    [term_id] => 50
    [name] => Events
    [slug] => events
    [term_group] => 0
    [term_taxonomy_id] => 50
    [taxonomy] => category
    [description] => 
    [parent] => 0
    [count] => 1456
    [filter] => raw
    [cat_ID] => 50
    [category_count] => 1456
    [category_description] => 
    [cat_name] => Events
    [category_nicename] => events
    [category_parent] => 0
    [is_post] => 
)

Webinar – 3D NAND Memory Cell Optimization

Webinar – 3D NAND Memory Cell Optimization
by admin on 11-07-2019 at 10:00 am

Flash memory has become ubiquitous, so much so that it is easy to forget what life before it was like. Large scale non-volatile storage was limited spinning disks, which were bulky, power hungry and unreliable. With NAND Flash, we have become used to carrying many gigabytes around with us all the time in the form of cell phones, USB… Read More


Rapid growth of AI/ML based systems requires memory and interconnect IP

Rapid growth of AI/ML based systems requires memory and interconnect IP
by admin on 11-07-2019 at 6:00 am

Artificial intelligence and machine learning (AI/ML) are working their way into a surprising number of areas. Probably the one you think of first is autonomous driving, but we are seeing a rapidly growing number of other applications as time goes on. Among these are networking, sensor fusion, manufacturing, data mining, numerical… Read More


Cadence Dives Deeper at Linley Fall Processor Conference

Cadence Dives Deeper at Linley Fall Processor Conference
by Randy Smith on 11-05-2019 at 10:00 am

I wrote about Cadence AI IP not long ago when I covered the Cadence Automotive Summit at the end of July (Tensilica DNA 100 Brings the AI Inference Solution for Level 2 ADAS ECUs and Level 4 Autonomous Driving, Tensilica HiFi DSPs for What I Want to Hear, and What I Don’t Want to Hear). One of those two blogs remains one of my most widely … Read More


Achronix Announces New Accelerator Card at Linley Fall Processor Conference – VectorPath

Achronix Announces New Accelerator Card at Linley Fall Processor Conference – VectorPath
by Randy Smith on 11-04-2019 at 10:00 am

This blog is my second blog from this year’s Linley Fall Processor Conference. The first two blogs focused on edge inference solutions. Achronix’s discussion was much broader than just AI/ML; it was about where FPGA’s have been going and culminated with a product announcement preview. I’ll get to the announcement in a moment, … Read More


Intel CEO Update Q4 2019

Intel CEO Update Q4 2019
by Daniel Nenni on 11-04-2019 at 6:00 am

Bob Swan started as interim CEO in June of 2018 and took the full-time CEO job in January of 2019. I was a vocal critic of the previous CEO Brian Krzanich (BK) and really felt he was not fit to serve. As it turns out I was right. It is not just the CEO himself, but also the people that he surrounds himself with. BK surrounded himself with the… Read More


Efficiency – Flex Logix’s Update on InferX™ X1 Edge Inference Co-Processor

Efficiency – Flex Logix’s Update on InferX™ X1 Edge Inference Co-Processor
by Randy Smith on 10-30-2019 at 10:00 am

Last week I attended the Linley Fall Processor Conference held in Santa Clara, CA. This blog is the first of three blogs I will be writing based on things I saw and heard at the event.

In April, Flex Logix announced its InferX X1 edge inference co-processor. At that time, Flex Logix announced that the IP would be available and that a chip,… Read More


“Connecting the Divide” at SEMICON Europa

“Connecting the Divide” at SEMICON Europa
by admin on 10-29-2019 at 2:00 pm

Connecting the Divide between Design and Manufacturing is an overarching theme within the ESD Alliance as these two essential semiconductor disciples become more reliant on each other. It’s also the reason we’re hosting  SMART Design, the first system-centric series showcasing advances in electronic system design to be held… Read More


Cadence Shows off 5LPE Hercules Implementation

Cadence Shows off 5LPE Hercules Implementation
by Randy Smith on 10-28-2019 at 10:00 am

In a joint presentation given by Samsung, Arm, and Cadence at the Arm TechCon event on October 9, 2019, Cadence showed some results and explained its collaboration project used to implement the new Arm Hercules CPU on Samsung’s advanced 5LPE process. I do not want to minimize the significance of Samsung’s and Arm’s participation… Read More


DAC 2020 – Call for Contributions

DAC 2020 – Call for Contributions
by Daniel Payne on 10-28-2019 at 6:00 am

57DAC in SFO

My first DAC was in 1987 so I’ve seen our industry expand greatly over the years, and I expect that #57DAC on July 19-23, 2020 in SFO to be another exciting event to attend for semiconductor professionals from around the globe. What makes DAC so compelling for me to visit are the people, exhibitors, panel discussions, technical… Read More


TSMC Update Q3 2019 Absolutely!

TSMC Update Q3 2019 Absolutely!
by Daniel Nenni on 10-25-2019 at 6:00 am

This will be a combination of the recent TSMC quarterly report, a look back at Cliff Hou’s keynote at the most recent TSMC conference, and conversations on SemiWiki.com. There has been a lot of press on this but of course the most important points are being missed. Semiconductors are complicated and getting more so, absolutely.… Read More