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One of the recent live events I attended was the 2022 GSA Silicon Leadership Summit on May 12th at the Santa Clara Convention Center (my favorite location). This was the first GSA live event in two years so it was a must attend gathering. This event targets semiconductor ecosystem executives (200+ people attended) so there were many… Read More
It’s a hostile world we live in, and cybersecurity of connected devices is a big concern. Attacks are rising rapidly, and vulnerabilities get exploited immediately. Supply chains are complex. Regulations are proliferating. Secrets don’t stay secrets for long – in fact, the only secret in a system with open-source algorithms… Read More
In a simple answer – everyone. A keynote presentation “Sensing the Unknowns and Managing Power” by Mahesh Tirupattur, the Executive Vice President at Analog Bits at the recent Siemens User2User conference, discussed the need and application of sensors in computing and power applications. Why sense? As Mahesh explains, sensing… Read More
The never ending appetite for higher bandwidths, faster data interfaces and lower latencies are bringing about changes in how data is processed at data centers. The expansion of cloud to the network edge has introduced broad use of artificial intelligence (AI) techniques for extracting meaning from data. Cloud supercomputing… Read More
At this year’s SPIE Advanced Lithography conference, changes to EUV masks were particularly highlighted, as a better understanding of their behavior is becoming clear. It’s now confirmed that a seemingly symmetric EUV mask absorber pattern does not produce a symmetric image at the wafer, as a conventional DUV … Read More
The live events I have attended thus far this year have been very good. As much as I liked the virtual events, attending in the comfort of my home or sailboat, it is great to be live and networking inside the semiconductor ecosystem, absolutely.
Ansys has been a great supporter of the Design Automation Conference but this year they … Read More
The VLSI Symposium on Technology & Circuits will be held in Hawaii from June 12th to June 17th. You can register for the conference here.
The tip sheet for the conference has been released and one thing that caught my eye is some data from the Intel 4 paper that Intel will be presenting at the conference.
Intel’s old roadmap had 14nm,… Read More
I attended the annual user group meeting called User2User in Santa Clara this year, hosted by Siemens EDA, with 51 presentations by customers in 11 tracks, and keynotes during each lunch hour from semiconductor executives. Joseph Sawicki, Executive VP, IC Segment, at Siemens EDA presented on a Tuesday, along with Prashant Varshney,… Read More
With the TSMC Technical Symposium coming next month there is quite a bit of excitement inside the fabless semiconductor ecosystem. Not only will TSMC give an update on N3, we should also hear details of the upcoming N2 process.
Hopefully TSMC will again share the number of tape-outs confirmed for their latest process node. Given… Read More
Are 112G PAM4 channels in one of your current or future designs? If you’re focusing on advanced products, the answer is likely YES. Design of these channels is quite challenging. Silicon design, SerDes, PCB traces, and interconnect all need to be balanced to achieve success. As they say, getting there is half the fun. An upcoming… Read More
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AI Bubble?