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Analog to Digital Converter Circuits for Communications, AI and Automotive

Analog to Digital Converter Circuits for Communications, AI and Automotive
by Daniel Payne on 12-29-2022 at 6:00 am

RF Data Converters, analog to digital converter, min

Sensors are inherently analog in nature, and they get digitized for processing by using an Analog to Digital Converter (ADC) block. At the recent IP SoC event I had the chance to see the presentation by Ken Potts, COO of Alphacore on their semiconductor IP for ADCs. I learned that Alphacore started out in 2012, now offering both standard… Read More


Webinar: Flexible, Scalable Interconnect for AI HW System Architectures

Webinar: Flexible, Scalable Interconnect for AI HW System Architectures
by Mike Gianfagna on 12-09-2022 at 6:00 am

Webinar Flexible Scalable Interconnect for AI HW System Architectures

Building next generation systems is a real balancing act. The high-performance computing demands presented by increasing AI an ML content in systems means there are increasing challenges for power consumption, thermal load, and the never-ending appetite for faster data communications.  Power, performance, and cooling … Read More


IEDM 2022 – Ann Kelleher of Intel – Plenary Talk

IEDM 2022 – Ann Kelleher of Intel – Plenary Talk
by Scotten Jones on 12-06-2022 at 10:00 am

Ann 2022 IEDM Plenary Dec. 5 Roadmap Slide

Ann Kelleher is Intel’s Executive Vice President, General Manager, Technology Development, and she gave the first plenary talk to kick off the 2022 IEDM, “Celebrating 75 Years of the Transistor A Look at the Evolution of Moore’s Law Innovation”. I am generally not a fan of plenary talks because I think they are often too broad and… Read More


Live Webinar: Code Review for System Architects

Live Webinar: Code Review for System Architects
by Daniel Nenni on 12-06-2022 at 6:00 am

Jade Banner

Register management tools have been used mostly in a bottom-up approach. There are some documents and/or spreadsheets created by the System Architects that are delivered to the design and verification teams. They then start capturing the HW/SW interface of the peripheral IPs in their in-house or commercial register management… Read More


Achieving 400W Thermal Envelope for AI Datacenter SoCs

Achieving 400W Thermal Envelope for AI Datacenter SoCs
by Kalar Rajendiran on 12-05-2022 at 10:00 am

Alchip BlockDiagram Oct 26 2022 tsmc na oip presentation

Successful ASIC providers offer top-notch infrastructure and methodologies that can accommodate varied demands from a multitude of customers. Such ASIC providers also need access to best-in-class IP portfolio, advanced packaging and test capabilities, and heterogeneous chiplet integration capability among other things.… Read More


INNOVA PDM, a New Era for Planning and Tracking Chip Design Resources is Born

INNOVA PDM, a New Era for Planning and Tracking Chip Design Resources is Born
by Daniel Nenni on 12-01-2022 at 6:00 am

Innova PDM

No doubt that the design success of nowadays system on chips (SoCs) is directly linked to the success of cost control. More market opportunities are open for less expensive system on chips and electronic systems.

Both the design cost prediction and the resource tracking during the design process, are key to such a success

Predicting… Read More


IDEAS Online Technical Conference Features Intel, Qualcomm, Nvidia, IBM, Samsung, and More Discussing Chip Design Experiences

IDEAS Online Technical Conference Features Intel, Qualcomm, Nvidia, IBM, Samsung, and More Discussing Chip Design Experiences
by Daniel Nenni on 11-29-2022 at 10:00 am

IDEAS 2022 Just Topics Icon

Ansys is hosting IDEAS Digital Forum 2022, a no-cost virtual event that brings together industry executives and technical design experts to discuss the latest in EDA for Semiconductors, Electronics, and Photonics.

See the full online conference agenda and list of speakers at www.ansys.com/IDEAS. The free registration will… Read More


TSMC OIP – Enabling System Innovation

TSMC OIP – Enabling System Innovation
by Daniel Payne on 11-25-2022 at 6:00 am

TSMC OIP roadmap min

On November 10th I watched the presentation by L.C. Lu, TSMC Fellow & VP, as he talked about enabling system innovation with dozens of slides in just 26 minutes. TSMC is the number one semiconductor foundry in the world, and their Open Innovation Platform (OIP) events are popular and well attended as the process technology and… Read More


2023: Welcome to the Danger Zone

2023: Welcome to the Danger Zone
by Daniel Nenni on 11-18-2022 at 6:00 am

Silicon Catalyst Danger Zone Ad

I just got this notice from my good friend and fellow sailor Rich Curtin. The Silicon Catalyst events are the best open networking events in Silicon Valley, absolutely. And this one includes another good friend Wally Rhines, the most interesting man in semiconductors, so you don’t want to miss this. The live event will definitely… Read More


Pushing Acceleration to the Edge

Pushing Acceleration to the Edge
by Dave Bursky on 11-04-2022 at 6:00 am

performane table siemens eda

As more AI applications turn to edge computing to reduce latencies, the need for more computational performance at the edge continues to increase. However, commodity compute engines don’t have enough compute power or are too power-hungry to meet the needs of edge systems. Thus, when designing AI accelerators for the edge, Joe… Read More