RISC-V have great adoption and momentum. One of the key benefits of RISC-V is the ability for SoC designers to extend its instruction sets to accelerate specific algorithms. Andes’ ACE (Andes Custom Extensions) allow customers to quickly create, prototype, validate and ultimately implement custom memories, dedicated ports… Read More
WEBINAR: The Power of Formal Verification: From flops to billion-gate designs
Semiconductor industry is going through an unprecedented technological revolution with AI/ML, GPU, RISC-V, chiplets, automotive and 5G driving the hardware design innovation. The race to deliver high performance, optimizing power and area (PPA), while ensuring safety and security is truly on. It has never been a more exciting… Read More
A New Verification Conference Coming to Austin
Actually not so new, just new to us in the US. Verification Futures is already well established as a Tessolve event with a 10-year track record in the UK. This year they are bringing the conference to Austin on September 14th (REGISTER HERE).
While DVCon is an ever-popular event for sharing verification ideas, it isn’t always accessible… Read More
The Recovery has Started and it’s off to a Great Start!
August’s WSTS Blue Book showed Q2-2023 sales rebounding strongly, up 4.2 percent vs. Q1, heralding the end of the downturn and welcome news for the beleaguered chip industry.
The really good news, however, was that the downturn bottomed one quarter earlier than previously anticipated. This pull-forward only added a modest US$11… Read More
DVCon India 2023 | Keynote: “Journeying Beyond AI: Unleashing the Art of Verification”
DVCon India 2023 | Keynote: “Journeying Beyond AI: Unleashing the Art of Verification” by Sivakumar P R, Founder & CEO, Maven Silicon
Get Ready for an Epic Tech Odyssey with the keynote, ‘Journeying Beyond AI: Unleashing the Art of Verification’, by P. R. Sivakumar, Founder, and CEO, Maven Silicon.
The semiconductor industry… Read More
ASML Update SEMICON West 2023
At SEMICON West I had a chance to catch up with Mike Lercel of ASML. In this article I am going to combine ASML presentation material from the SPIE Advanced Lithography Conference, Mike’s SEMICON presentation, my discussions with Mike at SEMICON and a few items from ASML’s recent earnings call.
DUV
ASML continues to improve DUV systems.… Read More
Wally Rhines Predicts the Future of AI at #60DAC
Dr. Walden Rhines has appeared many times on SemiWiki. His discussions touch on a variety of topics, most recently on the health of EDA and IP. His knowledge of our industry is substantial, and he always seems to have a new take on the trends and technologies that are unfolding around us. So, when Wally took the stage for a keynote address… Read More
WEBINAR: Driving Golden Specification-Based IP/SoC Development
The ever-increasing demands placed on Intellectual Property (IP) and System-on-Chip (SoC) development teams have resulted in an ever-increasing need for automation solutions that can boost productivity without contributing to further risk. Certainly, demands for automation have long been the drivers behind the growth… Read More
SEMICON West 2023 Summary – No recovery in sight – Next Year?
-SEMICON well attended but bouncing along the biz bottom
-Recovery seems at least a year away with memory even more
-AI creates hope but not impactful- Disconnect tween stocks & reality
-AMAT me too platform- Back end benefits from chiplets
SEMICON busy but subdued
SEMICON is certainly back to pre-covid levels or perhaps better.… Read More
WEBINAR: Leap Ahead of the Competition with AI-Driven EDA Technology
The demands on today’s designs are relentless. Each generation of devices needs to be faster, smaller, more functional, more connected and more secure than the previous generation. In the face of all this, the time required for next-generation devices to hit the market is dramatically shrinking. That means the competitive landscape… Read More
Memory Innovation at the Edge: Power Efficiency Meets Green Manufacturing