Design & Reuse held its IP-SoC Silicon Valley 24 event on April 25th, 2024, at the Hyatt Regency Santa Clara. The agenda was packed with many relevant and compelling presentations from companies large and small. I attended one presentation on security that stood out for me. Secure-IC presented “AI-powered cybersecurity:… Read More
The 2024 Design Automation Conference and Certus Semiconductor
DAC is right around the corner and this could possibly be the last one in San Francisco for a while so do not miss it. The weather will be absolutely great and there are many things to do outside of the conference including sailing on the bay.
The Design Automation Conference (DAC) is a premier event that focuses on the design and automation… Read More
Webinar – CHERI: Fine-Grained Memory Protection to Prevent Cyber Attacks
Cyber attacks are top of mind for just about everyone these days. As massive AI data sets become more prevalent (and more valuable), data security is no longer “nice to have”. Rather, it becomes critical for continued online operation and success. The AI discussion is a double-edged sword as well. While AI enables many new and life-changing… Read More
A Webinar with Silicon Catalyst, ST Microelectronics and an Exciting MEMS Development Contest
Most MEMS and sensor companies struggle to find an industrialization partner that can support early-stage research and help develop and transition unique concepts to high-volume production. The wrong partner means delays and increased development costs as the design moves between various facilities. Recently, Silicon … Read More
How Samtec Helps Achieve 224G PAM4 in the Real World
224 Gbps PAM4 gets attention for applications such as data center, AI/ML, accelerated computing, instrumentation and test and measurement. The question is how real is it and what are the challenges that need to be overcome to implement reliable channels at that data rate? If you wonder about these kinds of topics for your next design,… Read More
Webinar: Fine-grained Memory Protection to Prevent RISC-V Cyber Attacks
Most organizations are aware of cybercrime attempts such as phishing, installing malware from dodgy websites or ransomware attacks and undertake countermeasures. However, relatively little attention has been given to memory safety vulnerabilities such as buffer overflows or over-reads. For decades, the industry has created… Read More
Webinar: Samtec and Achronix Expand AI in the Data Center
The performance demands of data centers continue to grow, driven to large degree by the ubiquitous use of complex AI algorithms. On April 25, Embedded Computing Design held an informative webinar on this topic. Two experts looked at the problem from the standpoint of processor architecture and communication strategies, which… Read More
Synopsys is Paving the Way for Success with 112G SerDes and Beyond
Data communication speeds continue to grow. New encoding schemes, such as PAM-4 are helping achieve faster throughput. Compared to the traditional NRZ scheme, PAM4 can send twice the signal by using four levels vs. the two used in NRZ. The diagram at the top of this post shows the how data density is increased. With progress comes… Read More
Analog Bits Continues to Dominate Mixed Signal IP at the TSMC Technology Symposium
The recent TSMC Technology Symposium in the Bay Area showcased the company’s leadership in areas such as solution platforms, advanced and specialty technologies, 3D enablement and manufacturing excellence. As always, the TSMC ecosystem was an important part of the story as well and that topic is the subject of this post. Analog… Read More
WEBINAR: Navigating the Power Challenges of Datacenter Infrastructure
We all know power and energy management is a top-of-mind item for many, if not all new system designs. Optimizing system power is a vexing problem. Success requires coordination of many hardware and software activities. The strategies to harmonize operation for high performance and low power are often not obvious. Much… Read More


AI RTL Generation versus AI RTL Verification