First, I must say that I’m biased. I like Cheerleaders, they are lots of fun, I even married one. Second, I’m not a fan of Peggy Aycinena. She has been on her EDA feminist rant for years now and I have been targeted multiple times. My solution has been to ignore her and any publication that supports her but this time she has gone too far.… Read More
Robustness, Reliability and Yield at DAC
On Wednesday at DAC I met with Bob Slee, distributor and Michael Siu, AE for MunEDA to get an update on what’s new. MunEDA has EDA software for:
- Schematic porting
- Nominal circuit analysis
- Nominal circuit optimization
- Statistical circuit analysis
- Statistical circuit optimization
- IP porting
- Circuit model generation
Photo and Video Overview of DAC 2012
Sunday Night – you have to network at the EDAC kick-off party.… Read More
FinFET Standard Cells at DAC
Rajiv Bhateja, Dhrumil Gandhi and Neal Carney met with me at DAC on Wednesday to give an update on what’s new in 2012 for Tela Innovations, a provider of lithography optimized IP and tools. This team has a rich history in EDA and IP from companies like: ARM, Artisan, Mentor Graphics and Silicon Compilers.… Read More
Finding RTL Bugs Live Using Formal Techniques
Most of what you see at DAC is canned PowerPoint presentations, however on Tuesday afternoon I spotted a company called Oski Technology that was doing something almost unheard of – they had an engineer debugging a digital design from Nvidia using formal tools live. I later found out the engineer found 4 bugs in just three days… Read More
Electromagnetic Simulation Update from Nimbic
Dr. Raul Camposano, CEO of Nimbic talked with me on Wednesday at DAC to provide an update on what’s new with their electromagnetic simulation tools.… Read More
IC Cell Library Characterization at DAC
Edmond Macaluso, President of Z-Circuit Automation met with me at DAC on Tuesday afternoon to provide an overview of how their EDA tools characterize cell libraries. … Read More
3D Thermal and Mechanical Stress for IC Packaging
3D has been a growing buzz word in IC design and packaging for several years now, so it’s refreshing to actually find an EDA vendor that has developed tools to help analyze something like 3D thermal and mechanical stress at DAC. … Read More
From SPICE Netlist back to Schematics at DAC
I first heard about SPICE Vision Pro when working at Mentor Graphics where we needed a way to visualize SPICE netlists and debug SPICE simulation results node by node on a design where we didn’t have the original schematics. Last Monday I met the engineers from Concept Engineering in their booth at DAC to get an update, Gerhard… Read More
Fast SPICE from Kiev at DAC
Monday at DAC I met with an EDA start-up called Symica based in Kiev. Ian Tsybulkin, CEO met with me to give an overview of their tools.… Read More
Intel’s Pearl Harbor Moment