Way back in 1999 the open SystemC initiative (OSCI) was launched. In 2005 the IEEE standard for SystemC (IEEE1666-2005 if you are counting) was approved. In 2008, TLM 2.0 was standardized (transactional level models), making building virtual platforms using SystemC models easier. At least the models should be play nicely together,… Read More
Simulating in the Cloud
Yesterday I met with David Hsu who is the marketing guy for Synopsys’s cloud computing solution that they announced at their user-group meeting earlier this year. It was fun to catch up; David used to work for me back in VLSI days although he was an engineer writing place and route software back then.
David admits that this is… Read More
I love you, you love me, we’re a happy family…
The CEO panel at the 2nd GTC wasn’t especially enlightening. The theme was that going forward will require cooperation for success and everyone was really ready to cooperate.
The most interesting concept was Aart talking about moving from what he called “scale complexity” aka Moore’s law to what he … Read More
SNUG outside Silicon Valley
SNUG in Silicon Valley was in March so either you were there or you’ve missed it. But it is the summer (and fall) of SNUG in the rest of the world:
SNUG China (in Beijing, Shanghai, Shenzhen) on August 22nd-30th
SNUG Singapore on August 23rd
SNUG Taiwan (in Hsinchu) on August 25-26th
SNUG Japan (in Tokyo) on September 7th
SNUG … Read More
Synopsys MIPI Webinar
Synopsys MIPI Webinar: MIPI is really getting traction
Synopsys last two acquisitions of IP vendors, former ChipIdea in 2009 (Mixed-signal product line of MIPS) and Virage Logic in 2010, have allowed to built a stronger, diversified IP port-folio. Amazingly, Synopsys has found MIPI IP product line in the basket in both cases.… Read More
Synopsys Virtualizer
As you probably know, Synopsys last year acquired VaST and CoWare and a couple of years early had acquired Virtio. All three companies primarily competed in the virtual platform market. In addition, Synopsys is the #2 IP company (behind ARM) and has a wide range of tools for SoC design. So the interesting question is how would they… Read More
EDA Interoperability at DAC
Intro
My Wednesday breakfast at DAC last week was at the Interoperability event sponsored by Synopsys. The Synopsys moderator was so jovial that he reminded me of Jerry Lewis, I was relieved when the guests gave us an update.
Notes
Interconnect Modeling- Open Source Interconnect Technology Format (ITF)o Used by Star RC
–… Read More
Synopsys IC Validator at DAC
Intro
At DAC last week I visited the Synopsys demo suite to see what’s new with IC Validator.
Notes
Stelios Diamantidis, PMM
– In-design physical verification
– Sign-off reveals thousands of late stage DRC violations
– 28nm has 1.5K rules, 15K runset sizes
– Metal Fill changes timing
– The… Read More
HSPICE gets Faster, better Convergence
Hany El Hak – Product Marketing Manager
Frederik Iverson – AE
Scott Wetch – HSPICE Architect
HSPICE – 5 years ago convergence was not so good, while 95% of analog circuits today converge out of the box, no options are required.
Synopsys AMS Portfolio – wide range of tools
– Custom Designer: IC schematic and layout tools
–… Read More
iPDKs and Analog Constraints
Lunch time Monday at DAC and I learned about what’s new at the IPL Alliance in 2011.
IPL Sponsors: Magma, Mentor Graphics, Springsoft, Accelicon, Ciranova, Synopsys, TSMC, TowerJazz, Jedat, Tanner EDA
Two major projects:
1) iPDKS
2) Analog Constraints… Read More