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800x100 SNPS Intel Webinar 6 5 25 High Quality (1) (2)
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5 ways FPGA-based prototyping shrinks design time

5 ways FPGA-based prototyping shrinks design time
by Don Dingee on 12-01-2015 at 7:00 am

Engineers are trained to think linearly, along the lines of we started here, then we did this, and that, and this other stuff, and here is where we ended up. If you’ve ever presented in an internal review meeting, sales conference, or a TED-like event, you know that is a dangerous strategy in winning friends and influencing people.… Read More


HiSilicon’s Experience with Synopsys ICC2

HiSilicon’s Experience with Synopsys ICC2
by Daniel Nenni on 11-11-2015 at 4:00 pm

At TSMC’s OIP Symposium last month, Zhe (Jared) Lui of HiSilicon presented their experiences with Synopsys’ ICC2 physical design suite.

Jared started by giving an overview of Huawei and HiSilicon. HiSilicon is the semiconductor arm of Huawei. I assume everyone knows who Huawei is. To a first approximation they … Read More


Perfecting the Great Verification Fugue

Perfecting the Great Verification Fugue
by Bernard Murphy on 11-03-2015 at 7:00 am

Michael Sanie (Senior Director Marketing in the Synopsys Verification Group) gave the wrap-up presentation at SpyGlass World recently, on the Synopsys Verification Direction. I learned from an interview Michael gave to Paul McLellan that he is an accomplished pianist. I’m a pianist also, though of considerably less talent,… Read More


SpyGlass World 2015 User Group Meeting

SpyGlass World 2015 User Group Meeting
by Bernard Murphy on 10-26-2015 at 4:00 pm

I attended SpyGlass World this week – to give you an update, to catch up with old friends, including users, and to meet some of the new (to me) players from the Synopsys side of the event. The event was held in the United Club at Levi stadium, just like last year. Don’t know if this will continue. Merging the SpyGlass User Group into SNUG… Read More


Three New Things from ITC this year

Three New Things from ITC this year
by Daniel Payne on 10-23-2015 at 12:00 pm

The NFL has its annual Super Bowl contest each year, EDA vendors attend DAC, then the test folks attend ITCwhich was in Anaheim a few weeks ago. I’ve marketed ATGP, BIST and DFT tools before so I like to keep updated on what’s happening at conferences like ITC. Robert Ruiz from Synopsys spoke with me by phone to provide … Read More


Why FPGA synthesis with Synplify is now faster

Why FPGA synthesis with Synplify is now faster
by Don Dingee on 10-23-2015 at 7:00 am

The headline of the latest Synopsys press release drops quite a tease: the newest release of Synplify delivers up to 3x faster runtime performance in FPGA synthesis. In our briefing for this post, we uncovered the surprising reason why – and it’s not found in their press release.… Read More


SpyGlass World at Levi Stadium, October 21st

SpyGlass World at Levi Stadium, October 21st
by Bernard Murphy on 10-12-2015 at 2:00 pm

I suppose you might have something better to do next Wednesday but, seriously, it had better be pretty good. I admit I’m biased (I was the Atrenta CTO until very recently) but even given that and mixing metaphors, Atrenta really knocked it out of the park when they got the 49er stadium for their User Group meetings. You don’t have to … Read More


Leveraging Synopsys’ Lynx Design System for SoC Designs on Advanced Nodes

Leveraging Synopsys’ Lynx Design System for SoC Designs on Advanced Nodes
by Pawan Fangaria on 10-04-2015 at 7:00 am

There was a time when design goals were decided in the beginning, targeted on a particular technology node, design planning done for the same, and implementation done through point tools connected indesign flows customized according to the design. It’s no longer the case for modern SoC designs; there are multiple technology … Read More


Automotive MCU code fault-busting with vHIL

Automotive MCU code fault-busting with vHIL
by Don Dingee on 09-30-2015 at 7:00 pm

With electronic and software content in vehicles skyrocketing, and the expectations for flawless operation getting larger, the need for system-level verification continues to grow. Last month, we looked at a Synopsys methodology for virtual hardware in the loop, or vHIL… Read More