WP_Term Object
(
    [term_id] => 14
    [name] => Synopsys
    [slug] => synopsys
    [term_group] => 0
    [term_taxonomy_id] => 14
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 693
    [filter] => raw
    [cat_ID] => 14
    [category_count] => 693
    [category_description] => 
    [cat_name] => Synopsys
    [category_nicename] => synopsys
    [category_parent] => 157
    [is_post] => 
)
            
800x100 Efficient and Robust Memory Verification
WP_Term Object
(
    [term_id] => 14
    [name] => Synopsys
    [slug] => synopsys
    [term_group] => 0
    [term_taxonomy_id] => 14
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 693
    [filter] => raw
    [cat_ID] => 14
    [category_count] => 693
    [category_description] => 
    [cat_name] => Synopsys
    [category_nicename] => synopsys
    [category_parent] => 157
    [is_post] => 
)

Tutorial on Advanced Formal: NVIDIA and Qualcomm

Tutorial on Advanced Formal: NVIDIA and Qualcomm
by Bernard Murphy on 04-03-2018 at 7:00 am

I recently posted a blog on the first half of a tutorial Synopsys hosted at DVCon (2018). This blog covers the second half of that 3½ hour event (so you can see why I didn’t jam it all into one blog :D. The general theme was on advanced use models, the first half covering use of invariants and induction and views from a Samsung expert on efficient… Read More


A DVCon Tutorial on Advanced Formal Usage

A DVCon Tutorial on Advanced Formal Usage
by Bernard Murphy on 03-27-2018 at 7:00 am

Synopsys has been quite active lately in their messaging around formal verification. One such event at DVCon this year was a tutorial on some of the more advanced techniques/ methodologies that are accessible to formal teams, mostly presented by customers, though opened by a Synopsys presentation. The tutorial covered so many… Read More


Aart de Geus At the Heart of Impact!

Aart de Geus At the Heart of Impact!
by Alex Tan on 03-26-2018 at 7:00 am

At the Silicon Valley SNUG 2018, Synopsys Chairman and co-CEO Dr. Aart de Geuss gave his keynote speech addressing attendees on how far we have evolved, and at times encountered the aha factor that helps propel us to the next level. He explored trends as well as the current state of his company solution offerings.


Moore’s Law, Digital
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Qualcomm, AMD on Verification with Synopsys

Qualcomm, AMD on Verification with Synopsys
by Bernard Murphy on 03-22-2018 at 7:00 am

Synopsys hosts a regular lunch at DVCon each year (at least over the last few years I have checked), a nice meal and a show, opening a marketing update followed by 2-3 customer presentations on how they use Synopsys verification in their flows. This year’s event was moderated by Piyush Sancheti from Synopsys Verification marketing… Read More


Don’t Stand Between The Anonymous Bug and Tape-Out (Part 2 of 2)

Don’t Stand Between The Anonymous Bug and Tape-Out (Part 2 of 2)
by Alex Tan on 03-16-2018 at 7:00 am


The second panel is about system coverage and big data. Coverage metrics have been used to gauge the quality of verification efforts during development. At system level, there are still no standardized metrics to measure full coverage. The emergence of PSS, better formal verification, enhanced emulation and prototyping techniques… Read More


EDA and Semiconductor — Is There Growth In The Ecosystem?

EDA and Semiconductor — Is There Growth In The Ecosystem?
by Alex Tan on 03-07-2018 at 12:00 pm


The semiconductor industry has gone through several major transitions driven by different dynamics such as shift in business models (fab-centric to fab-less), product segmentation (system design house, IP developers) and end market applications (PC to cloud; and recently, to both automotive and Internet of Things — IOT’s,Read More


Webinar: Bottlenecks be Gone – Automated Performance Verification with Synopsys

Webinar: Bottlenecks be Gone – Automated Performance Verification with Synopsys
by Bernard Murphy on 02-14-2018 at 10:00 pm

Performance verification is among the most challenging of objectives in any SoC verification plan. It’s difficult to start effectively until quite late in the development cycle, at which point you don’t have a lot of time left to develop extensive performance-oriented testbenches. So many teams adapt functional tests to this… Read More


Data Security – Why It Might Matter to Design and EDA

Data Security – Why It Might Matter to Design and EDA
by Alex Tan on 02-14-2018 at 12:00 pm


According to the Economist,
The world’s most valuable resource is no longer oil, but data”.
Is this the case?Data is the by-product ofmany aspects of recent technology dynamics and is becoming the currency of today’s digital economy. All categories in Gartner’s Top10 Strategic Technology Trends for 2018 (FigureRead More


Unexpected Help for Simulation from Machine Learning

Unexpected Help for Simulation from Machine Learning
by Tom Simon on 02-13-2018 at 12:00 pm

I attend a lot of events on machine learning and write about it regularly. However, I learned some exciting new information about machine learning in a very surprising place recently. Every year for the last few years I have attended the HSPICE SIG dinner hosted by Synopsys in Santa Clara. This event starts with a vendor fair featuring… Read More


More Than Your Average IP Development Kit

More Than Your Average IP Development Kit
by Bernard Murphy on 02-13-2018 at 7:00 am

When I think of an IP development kit, I imagine software plus a hardware model I can run on a prototyper or, closer to the kits offered by semi companies, software plus a board hosting an FPGA implementation of the IP along with DDR memory, flash and a variety of interfaces. These approaches work well for IP providers because hardware… Read More