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Taming The Challenges of SoC Testability

Taming The Challenges of SoC Testability
by Pawan Fangaria on 05-12-2014 at 10:00 pm

With the advent of large SoCs in semiconductor design space, verification of SoCs has become extremely challenging; no single approach works. And when the size of an SoC can grow to billions of gates, the traditional methods of testability of chips may no longer remain viable considering the needs of large ATPG, memory footprint,… Read More


Mentor @ #51DAC Must See!

Mentor @ #51DAC Must See!
by Daniel Nenni on 05-11-2014 at 4:00 am

We’ve packed each day full of exciting activities focused on the latest in cutting-edge design. Use this site to find your favorite Mentor experts and events—whether in our suites and networking events, at our partner booths or in the conference. You won’t want to miss a thing!

Celebrating Your Design Creativity!
Rejuvenate with… Read More


What Do You Do When You Are Not Designing?

What Do You Do When You Are Not Designing?
by Paul McLellan on 04-30-2014 at 10:07 pm

DAC is coming up in a month (OMG less than 4 weeks and we are so not ready I hear a hundred marketing people cry out). That gives you four weeks (and a couple of days) to tell Mentor what you do in your spare time that you are passionate about (spare time, I hear a hundred engineers cry out, what is that?) and you could win $300.

For DAC, Mentor… Read More


Carey Robertson: Reliability Checks in Advanced Nodes

Carey Robertson: Reliability Checks in Advanced Nodes
by Daniel Nenni on 04-28-2014 at 8:30 pm

Last week I had the pleasure of presenting at the Electronic Design Process Symposium (EDPS) workshop. This was my first time attending and I was very impressed. There were good presentations but I learned as much from the Q&A and the side conversations before/after/breakfast/lunch/etc. If you have the opportunity to attend,… Read More


FinFET & Multi-patterning Need Special P&R Handling

FinFET & Multi-patterning Need Special P&R Handling
by Pawan Fangaria on 04-28-2014 at 1:00 pm

I think by now a lot has been said about the necessity of multi-patterning at advanced technology nodes with extremely low feature size such as 20nm, because lithography using 193nm wavelength of light makes printing and manufacturing of semiconductor design very difficult. The multi-patterning is a novel semiconductor manufacturing… Read More


EUV Slips a Year Per Year…Or More

EUV Slips a Year Per Year…Or More
by Paul McLellan on 04-19-2014 at 1:54 am

I was at EDPS in Monterey the last couple of days. It is one of the most interesting conferences to attend. Go next year since you already missed it this year. It is not big but the quality of the content is high. Historically the dinner in the middle is in the Monterey Yacht Club and there is a keynote speech. A few years ago it was me but this… Read More


Show Me How To Get Better DRC and LVS Results For My SoC Design

Show Me How To Get Better DRC and LVS Results For My SoC Design
by Daniel Payne on 04-14-2014 at 3:30 pm

Most IC engineers learn best by hands-on experience when another more experienced person can show us what to do. If you cannot find that experienced person, then the next best thing is a video from an expert. I was surprised to find out that video was so important today that the #2 most viewed web site on the Internet was www.youtube.comRead More


Sketch Router and auto-assist PCB layout

Sketch Router and auto-assist PCB layout
by Don Dingee on 03-31-2014 at 6:30 pm

Archaic tech metaphors abound, stuck in the psyche of users everywhere. We still “dial” numbers, long after the benefit of a short pull area code disappeared. (Humans could dial 1, 2, or 3 a lot faster on a rotary phone, and there were fewer dialpulses for central office switches to decode – thus big cities with more phone traffic like… Read More


Mentor Acquires BDA!

Mentor Acquires BDA!
by Daniel Nenni on 03-23-2014 at 7:00 am

Mentor Graphics acquired Berkeley Design Automation this morning. The details of the deal were unannounced. This is a strong move by Mentor to challenge Cadence and Synopsys in the nanometer analog/mixed-signal market and nanometer memory characterization market, respectively. Mentor not only acquires the technology and… Read More


Mentor U2U Is On April 10th

Mentor U2U Is On April 10th
by Paul McLellan on 03-17-2014 at 7:19 pm

If you are a Mentor user, U2U, the Mentor User group is coming up on April 10th. This is an all day event at the DoubleTree. The event is free. Registration starts at 8am and the agenda itself starts at 9am. There is a reception from 5-6pm in the evening.

There are three keynotes. At 9am: Wally Rhines, CEO of Mentor. The Big Squeeze. For … Read More