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Electronic Design Automation
Many years ago, I remember discussions around islands of automation/silos. Within the scope of any given silo there is plenty of automation to handle tasks relevant to that phase. But managing the full lifecycle from concept through manufacturing to field support must cross between silos, and those transitions are not as clean… Read More
With the advent of IoT devices, vehicles have become increasingly interconnected, offering enhanced automation, connectivity, electrification, and shared mobility. However, this progress also brings forth unprecedented challenges, particularly in ensuring the safety and security of automotive electronics. The complexity… Read More
Customer case studies have always been my favorite source of information. Press releases are a great start but there is always more to the story. Fortunately, I had the opportunity to speak with Sumit Vishwakarma, principal product manager at Siemens EDA about their recent press release with Interchip. I was an advisor to Berkeley… Read More
In today’s rapidly evolving semiconductor industry, the design and integration of intellectual property (IP) play a pivotal role in achieving competitive advantage and market success. Whether sourced from commercial IP providers or developed in-house, ensuring that IP designs are compliant with signoff requirements… Read More
The next design revolution is clearly upon us. Traditional Moore’s Law is slowing, but the exponential demand for innovation and form factor density is not. When you can no longer get it done with a single monolithic chip, moving to a multi-die approach is the answer. This emerging design methodology has many challenges – supply… Read More
Perforce is a company that provides software solutions primarily focused on version control, especially for large-scale development projects. Version control systems manage changes to documents, computer programs, large web sites, or other collections of information. Perforce’s main product is Helix Core, formerly… Read More
IC designs have physical verification applications like Layout Versus Schematic (LVS) at the transistor-level to ensure that layout and schematics are equivalent, in addition there’s an Electrical Rules Check (ERC) for connections to well regions called a soft check. The connections to all the devices needs to have the most… Read More
In the rapidly evolving world of Radio Frequency Integrated Circuits (RFIC), the challenge has always been to design efficient, high-performance components quickly and accurately. Traditional methods, while effective, come with a high complexity and a lengthy iteration process. Today, we’re excited to unveil RFIC-GPT… Read More
It was a dark and stormy night here in Silicon Valley but we still had a full room of semiconductor professionals. I emceed the event. In addition to demos, customer and partner presentations, we did a Q&A which was really great. One thing I have to say is that Intel really showed up for both DesignCon and the Chiplet Summit. Quite… Read More
A different approach to formally verifying very challenging datapath functions. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and now Silvaco CTO) and I continue our series on research ideas. As always, feedback welcome. We’re planning to add a wrinkle… Read More
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