Monday at DAC I met with an EDA start-up called Symica based in Kiev. Ian Tsybulkin, CEO met with me to give an overview of their tools.… Read More
Electronic Design Automation
A DAC Update from Mentor Graphics on IC Layout and Circuit Simulation Tools
Linda Fosler, Tom Daspit and Mitch from Mentor Graphics met with me last Monday at DAC to provide an update on IC layout and circuit simulation tools. My notes follow:
Overview – Pyxis for Schematic and Layout, IC Station is re-branded as Pyxis. (Pyxis schematic is still Falcon, Ample language is still used.)… Read More
ST using Cadence IC Tools with Module Generators
Cadence invited Francois Lemery of ST Microelectronics to speak at a luncheon last Monday at DAC about designing for the 20nm node using module generators. Here are my trip report notes:
Press at DAC
The way that the press that covers EDA has changed in the last few years is quite dramatic. Semiwiki is, of course, part of that change. The official press is less and less relevant and bloggers and newsletters are more and more important.… Read More
DAC Attendance up
Attendance at DAC is up across the board. Not surprisingly, with San Francisco being so close to silicon valley, the biggest increase was in people coming to see the exhibits.… Read More
Schematic, IC Layout, Clock and Timing Closure from ICScape
Before this DAC I had never even heard of ICScape, so on Monday and Wednesday I visited their booth to find out their story.
Steve Yang, Ph.D. (Co-founder and President), Ravi Ravikumar (Marketing)
ICScape was founded in 2005 in Santa Clara by Steve Yang (Circuit Design engineer for microprocessor, Synopsys) and Jason Xing (Sun… Read More
Fast Monte Carlo and Analog Fast SPICE
Britto Vincent of ProPlus Design Solutions met with me at DAC on Monday morning to talk about Design For Yield (DFY) and Analog Fast SPICE.
In 2011 ProPlus announced DFY tools where the technology came from IBM, it provides fast Monte Carlo results up to 3 sigma, then added NanoSpice for faster simulation results. Similar in approach… Read More
How many languages an Engineer should speak?
I speak VHDL and SystemC, others speak Verilog and SystemVerilog … what do you speak?
Before getting into the core of the topic let me give you some round figures, engineers love numbers. Julian Lonsdale “European Sales Manager at Aldec” informed me at the Xfest Munich last month that Aldec carried out a survey to evaluate the usage… Read More
President Obama at DAC 2012
Okay, President Obama didn’t actually stop at DAC but he did do a drive by. I happened to be stepping out for some much needed fresh air and there goes his speeding motorcade. It was quite a sight actually, with all of the motorcycles, SUVs, a SWAT vehicle and even a paramedic rig (my son the Fireman drives one of those). The president … Read More
Partitioning Panel
I moderated a panel on partitioning today and I have to say that I learned some things. The panelists were Jonathan DeMent from IBM, Santosh Santosh from NVIDIA and Hao Nham of eSilicon. Considering the different types of designs being done their approach to partitioning and the reasons for doing so were very similar.
When you first… Read More


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