SILVACO 073125 Webinar 800x100
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EDA

Electronic Design Automation

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Atrenta at DAC: Fast Lint, IP Kit and More

Atrenta at DAC: Fast Lint, IP Kit and More
by Paul McLellan on 05-09-2012 at 7:03 pm
Categories: EDA

Atrenta will have a new look this year at DAC. I’m not quite sure what that means but we’ll all just have to go along and find out.

They have three users talking about their use of Atrenta’s tools. All 3 of these presentations are in the user-track poster session on Tuesday June 5th 12.30-1.30pm in room 105 (which … Read More

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Customers Talk About Reliability, Low-Power and 3D

Customers Talk About Reliability, Low-Power and 3D
by Paul McLellan on 05-09-2012 at 1:13 pm
Categories: Ansys, Inc., EDA

At DAC in San Francisco this year, Apache once again have a mixture of presentations by customers on their use of Apache tools and presentations by Apache themselves on their products. Most of the customer presentations are given just once, but the product presentations are given multiple times over the three days.

I think one of… Read More

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San Francisco Bars

San Francisco Bars
by Paul McLellan on 05-08-2012 at 6:00 pm
Categories: EDA, Events

If you are visiting DAC and want a drink in the evening then you are in an interesting city and you don’t have to go to a bar just like the ones in the city where you live. Here are a few unique places but take note, most of these places don’t serve any food, they are all about the drinks:

Bourbon and Branch. It is an old speakeasy. You … Read More

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Achieving Rapid Verification Convergence of ARM® AMBA® 4 ACE™ Designs using Discovery™ Verification IP

Achieving Rapid Verification Convergence of ARM® AMBA® 4 ACE™ Designs using Discovery™ Verification IP
by Eric Esteve on 05-07-2012 at 3:17 am
Categories: IP, Synopsys

Synopsys is consolidating the company positioning on Verification IP. We have announced the launch of Discovery VIP in Semiwiki, in February this year, and we have commented about the acquisition of nSys and ExpertIO in January. This webinar, “Achieving Rapid Verification Convergence of ARM® AMBA® 4 ACE™ Designs using Discovery™… Read More

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TSMC 20nm Challenges!

TSMC 20nm Challenges!
by Daniel Nenni on 05-06-2012 at 7:00 pm
Categories: EDA, Foundries, TSMC
4 Comments

Now that the 28nm challenges are dead
It is time to look ahead
The tabloid pundits may not agree
But Moore’s law again you will see
The semiconductor ecosystem is humming
(2X gate density -20%+ performance-20%+ power savings)
The 20nm design starts are coming!

Okay, I’m really bad at poetry. Gambling however, I do pretty well. Las… Read More

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Formal Verification, there’s an App for that

Formal Verification, there’s an App for that
by Paul McLellan on 05-06-2012 at 6:00 pm
Categories: EDA
1 Comment

The success of Apple’s AppStore has made people aware that software doesn’t have to be delivered in a big monolithic lump. Indeed, going back a bit earlier, Apple’s iTunes store made people aware that you didn’t have to buy a whole album if you only wanted a track or two.

EDA applications in today’s… Read More

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Where to eat lunch or get a beer at DAC

Where to eat lunch or get a beer at DAC
by Paul McLellan on 05-04-2012 at 11:17 pm
Categories: EDA, Events
5 Comments

You are going to DAC. And you don’t want to eat a Moscone Center rubber chicken Caesar salad for lunch. But you lack local knowledge. So here are some places within a 10 minute walk. These are just places I like. Nobody is paying me to recommend them.

Places to eat
The food court in the San Francisco Center on Market Street between… Read More

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28nm Layout Needs Signoff Quality at Design Time

28nm Layout Needs Signoff Quality at Design Time
by Pawan Fangaria on 05-03-2012 at 8:30 pm
Categories: Cadence, EDA

We are all aware that at 28nm and below several types of complex layout effects manifest themselves into the design and pose a herculean task, with several re-spins to correct them at pre-tapeout. It’s apparent that the layout needs to be correct by construction at the very beginning during the design stage.

Having worked at Cadence… Read More

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The Biggest EDA Company You’ve Never Heard Of

The Biggest EDA Company You’ve Never Heard Of
by Paul McLellan on 05-02-2012 at 8:30 pm
Categories: EDA
4 Comments

There’s this EDA company. They have over 100 tapeouts. They have a $28M in funding. They have 250 people. And you’ve never heard of them. Or at least I hadn’t.

They are ICScape. They started in 2005 with an investment from Acorn Campus Ventures and delivered their first product, ClockExplorer, in 2007 and their… Read More