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Ansys and Intel Foundry Direct 2024: A Quantum Leap in Innovation

Ansys and Intel Foundry Direct 2024: A Quantum Leap in Innovation
by akanksha soni on 03-06-2024 at 2:00 pm

Ansys and Intel Foundry Direct 2024

In the dynamic realm of technological innovation, collaborations and partnerships often serve as catalysts for groundbreaking advancements. Continuing along this trajectory, Ansys, a global leader in engineering simulation software, has forged a partnership with Intel Foundry to enable multiphysics chip design. The … Read More


Siemens Promotes Digital Threads for Electronic Systems Design

Siemens Promotes Digital Threads for Electronic Systems Design
by Bernard Murphy on 03-06-2024 at 6:00 am

Digital threads min

Many years ago, I remember discussions around islands of automation/silos. Within the scope of any given silo there is plenty of automation to handle tasks relevant to that phase. But managing the full lifecycle from concept through manufacturing to field support must cross between silos, and those transitions are not as clean… Read More


Designing for Security for Fully Autonomous Vehicles

Designing for Security for Fully Autonomous Vehicles
by Kalar Rajendiran on 03-05-2024 at 10:00 am

OSI Seven layer model for securing network communication

With the advent of IoT devices, vehicles have become increasingly interconnected, offering enhanced automation, connectivity, electrification, and shared mobility. However, this progress also brings forth unprecedented challenges, particularly in ensuring the safety and security of automotive electronics. The complexity… Read More


INTERCHIP achieves 3x faster verification for next-gen clocking oscillator with advanced analog and mixed-signal EDA technology

INTERCHIP achieves 3x faster verification for next-gen clocking oscillator with advanced analog and mixed-signal EDA technology
by Daniel Nenni on 03-05-2024 at 6:00 am

siemens symphony interchip large

Customer case studies have always been my favorite source of information. Press releases are a great start but there is always more to the story. Fortunately, I had the opportunity to speak with Sumit Vishwakarma, principal product manager at Siemens EDA about their recent press release with Interchip. I was an advisor to Berkeley… Read More


A Game-Changer for IP Designers: Design Stage Verification

A Game-Changer for IP Designers: Design Stage Verification
by Kalar Rajendiran on 03-04-2024 at 10:00 am

Calibre Shift Left Solutions Enable Reducing TTM

In today’s rapidly evolving semiconductor industry, the design and integration of intellectual property (IP) play a pivotal role in achieving competitive advantage and market success. Whether sourced from commercial IP providers or developed in-house, ensuring that IP designs are compliant with signoff requirements… Read More


How MZ Technologies is Making Multi-Die Design a Reality

How MZ Technologies is Making Multi-Die Design a Reality
by Mike Gianfagna on 03-04-2024 at 6:00 am

How MZ Technologies is Making Multi Die Design a Reality

The next design revolution is clearly upon us. Traditional Moore’s Law is slowing, but the exponential demand for innovation and form factor density is not. When you can no longer get it done with a single monolithic chip, moving to a multi-die approach is the answer. This emerging design methodology has many challenges – supply… Read More


2024 Outlook with Adam Olson of Perforce

2024 Outlook with Adam Olson of Perforce
by Daniel Nenni on 02-29-2024 at 10:00 am

adam olson 2021

Perforce is a company that provides software solutions primarily focused on version control, especially for large-scale development projects. Version control systems manage changes to documents, computer programs, large web sites, or other collections of information. Perforce’s main product is Helix Core, formerly… Read More


Soft checks are needed during Electrical Rule Checking of IC layouts

Soft checks are needed during Electrical Rule Checking of IC layouts
by Daniel Payne on 02-28-2024 at 10:00 am

Metal1 Via Metal2 s

IC designs have physical verification applications like Layout Versus Schematic (LVS) at the transistor-level to ensure that layout and schematics are equivalent, in addition there’s an Electrical Rules Check (ERC) for connections to well regions called a soft check. The  connections to all the devices needs to have the most… Read More


Revolutionizing RFIC Design: Introducing RFIC-GPT

Revolutionizing RFIC Design: Introducing RFIC-GPT
by Jason Liu on 02-28-2024 at 6:00 am

Figure1 (10)

In the rapidly evolving world of Radio Frequency Integrated Circuits (RFIC), the challenge has always been to design efficient, high-performance components quickly and accurately. Traditional methods, while effective, come with a high complexity and a lengthy iteration process. Today, we’re excited to unveil RFIC-GPTRead More


2024 Signal & Power Integrity SIG Event Summary

2024 Signal & Power Integrity SIG Event Summary
by Daniel Nenni on 02-27-2024 at 10:00 am

SIG Event Synopsys

It was a dark and stormy night here in Silicon Valley but we still had a full room of semiconductor professionals. I emceed the event. In addition to demos, customer and partner presentations, we did a Q&A which was really great. One thing I have to say is that Intel really showed up for both DesignCon and the Chiplet Summit. Quite… Read More