There was a time not that long ago, before smartphones arrived on the scene, where Mentor Embedded Nucleus RTOS was dominant in non-Nokia feature phones – Mentor is part of the “Billion Unit Mobile Club”. Since then, Mentor has been searching to recreate that type of success, and like so many other software firms, they are now aiming… Read More
Electronic Design Automation
TI’s Way of Strategies – Formation & Execution
For a company to stand still and continually prosper even after facing several downturns in its career of 80+ years, and still move swiftly with strong commitment and confidence, its strategy has to be right and rock solid possessing sustainable competitive advantage, and of course it has to be an early mover in everything it does… Read More
A Brief History of Chip Design at Apple Computer
Steve Wozniak in 1976 designed the Apple 1 while working at HP during the daytime, and he used standard parts to keep costs low, like:
- 6502 CPU from MOS Technology
- 8K of DRAM
- TTL logic for driving video and random logic
- PROM to hold the BASIC language and primitive OS
SoC Functional Verification Planning and Management Goes Big
Big SoC designs typically break existing EDA tools and old methodologies, which then give rise to new EDA tools and methodologies out of necessity. Such is the case with the daunting task of verification planning and management where terabytes of data have simply swamped older EDA tools, making them unpleasant and ineffective… Read More
A Methodology for Assertion Reuse in SoC Designs
As your SoC design can contain hundreds of IP blocks, how do you verify that all of the IP blocks will still work together correctly once assembled? Well, you could run lots of functional verification at the full-chip level and hope for the best in terms of code coverage and expected behavior. You could buy an expensive emulator to … Read More
6 reasons Synopsys covets C/C++ static analysis
By now, you’ve probably seen the news on Synopsys acquiring Coverity, and a few thoughts from our own Paul McLellan and Daniel Payne in commentary, who I respect deeply – and I’m guessing there are many like them out there in the EDA community scratching their heads a little or a lot at this. I’m not from corporate, but I am here… Read More
Mounir Hahad Rejoins Silvaco
Mounir Hahad just joined Silvaco as VP engineering. And when I say joined I really mean rejoined. I had a call with him to find out how that happened.
Mounir studied in France for a PhD in computer science on numerical computing. In 1995 the then-director of TCAD at Silvaco called him up having read some of his published papers. Silvaco… Read More
Before SPICE Circuit Simulation Comes TCAD Tools
I’ve run SPICE circuit simulators since the 1970’s and they use transistor models where the device parameters are provided by the foundry. These transistor and interconnect parameters come from an engineer at the foundry who has characterized silicon with actual measurements or by running a TCAD (Technology CAD)… Read More
Synopsys Acquires Coverity
Synopsys announced this afternoon that they are acquiring Coverity for $375M subject to all the usual reviews.
There are a couple of other big EDA connections. Aki Fujimora, who was CTO of Cadence, is on the board. And Adreas Kuehlmann is the VP of R&D. He used to run Cadence Berkeley Laboratories before moving to the other end… Read More
One SPIE session not to miss
The time is nigh for another meeting of the practitioners of the lithographic arts, dark and otherwise, at the SPIE Advanced Lithography symposium.
I love this conference for the engagement you see, both in the sessions and in the hallways. People actually meet and talk and argue. There’s always interesting gossip, exciting technologies,… Read More
Should the US Government Invest in Intel?