Mentor Graphics acquired Berkeley Design Automation this morning. The details of the deal were unannounced. This is a strong move by Mentor to challenge Cadence and Synopsys in the nanometer analog/mixed-signal market and nanometer memory characterization market, respectively. Mentor not only acquires the technology and… Read More
Electronic Design Automation
DAC: Automotive, IP and Security
DAC is in the first week of June in San Francisco as I’m sure you already know if you are reading this. Historically DAC has focused on electronic design automation (EDA) and embedded software and systems (ESS). This year there are three new areas: automotive, Intellectual Property (IP) and security.
Automotive
Ever increasing… Read More
Evaluate MEMS Devices out-of-fab Before Fabrication
MEMS design and fabrication is highly complex in the sense that the fabrication process heavily depends on the design, unlike IC fabrication which has a standard set of processes. A slight change in MEMS design can alter its fabrication steps to a large extent. For example, setting device parameters such as capacitance or linear… Read More
ARM, Cadence and the Internet of Things
There is clearly a lot of hype about the Internet of Things (IoT) right now, but also it is clear that it will be a real market. In fact, it already is with various medical, fitness and home-appliance products already available. At CES in January, wearables was probably the biggest trend. That doesn’t always pan out (3D TV was… Read More
TLM Modeling Environment Goes Commercial
The most successful EDA companies typically choose a domain where they have deep knowledge, then serve a few leading-edge customers that are willing to work with a start-up in exchange for early access to that new technology. The theory is that if you can satisfy the leading-edge customer then you can also satisfy the rest of the … Read More
Triple Patterning
As you can’t have failed to notice by now, 28nm is the last process node that does not require double patterning. At 20nm and below, at least some layers require double patterning. The tightest spacing is typically not the transistors but the local interconnect and, sometimes, metal 1.
In the litho world they call double patterning… Read More
Aldec the leader in DO254
I am convinced after studying out the matter, that Aldec is one of the leaders in DO254 certification. As you listen and read the news as I do about flight MA-370, you keep theorizing and wondering. This is a good time to introduce the reader to the seriousness of flight worthy electronics and the arduous process to achieve certification.… Read More
Social Media at Carbon Design Systems
Started in 2002 Carbon Design Systems has ESL (Electronic System Level) modeling and validation tools for complex SoC design. With their software you can:
- Perform system level model generation of existing and 3rd party IP directly from RTL for use in any virtual platform
- Do performance analysis & optimization of SoC architectures
Mentor U2U Is On April 10th
If you are a Mentor user, U2U, the Mentor User group is coming up on April 10th. This is an all day event at the DoubleTree. The event is free. Registration starts at 8am and the agenda itself starts at 9am. There is a reception from 5-6pm in the evening.
There are three keynotes. At 9am: Wally Rhines, CEO of Mentor. The Big Squeeze. For … Read More
A Fill Solution for 20nm at TSMC
By Jeff Wilson, Mentor Graphics
We’ve talked about the new requirements for Fill in IC design for advanced nodes in previous blogs on this site. This time I’d like describe the fill solution that Mentor and TSMC have jointly developed to meet the requirements of fill for TSMC’s 20nm (N20) manufacturing process.
The traditional… Read More
Facing the Quantum Nature of EUV Lithography