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Electronic Design Automation
I just read an interesting white paper on functional verification of analog blocks using SV-RNM (SystemVerilog real number modeling). The content is worth the effort to read closely as it elaborates a functional verification flow for RNM matching expectations for digital logic verification, from randomization to functional… Read More
I’ve been working with AMIQ EDA for several years, and have frequently been impressed by new capabilities in their Design and Verification Tools Integrated Development Environment (DVT IDE) family. They just announced AI Assistant, which leverages large language model (LLM) technology. LLMs are much in the news these days,… Read More
LLMs have amazing capabilities but inference run times grow rapidly with the size of the input (prompt) sequence, a significant weakness for some applications in engineering. State space models (SSMs) aim to correct this weakness. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur,… Read More
It’s a fact of life that technology marches on. Older process nodes get replaced by newer ones. As a result, ASSPs and FPGAs are obsoleted, leaving behind large system design investments that need to re-done. Since many of these obsolete designs are performing well in the target application, this re-do task can be particularly … Read More
I was invited to the Fem.AI conference in Menlo Park, the first sponsored by the Cadence Giving Foundation with a goal to promote increased participation of women in the tech sector, especially in AI. Not just for equity, also to grow the number of people entering the tech/AI workforce. There are countless surveys showing that demand… Read More
Most of the RISC-V action at the end of June was at the RISC-V Summit Europe, but not all. In fact, a group of well-informed and opinionated experts took over the Pavilion stage at the Design Automation Conference to discuss functional verification challenges for RISC-V and open-source IP.
Technology Journalist Ron Wilson and … Read More
As electric vehicles (EVs) gain widespread adoption, safety, reliability, and efficiency are becoming increasingly important. A crucial component in ensuring these aspects is the power module (PM), which manages the energy flow between the EV battery and the motor. The design of these power modules must not only meet the high-performance… Read More
Signal Integrity (SI) and Power Integrity (PI) issues are critical to analyze, ensuring the proper operation of PCB systems and IC packages, yet the computational demands from EDA tools can cause engineers to only analyze what they deem are critical signals, instead of the entire system. Cadence has managed to overcome this SI/PI… Read More
You might think that in the sensing world all the action is in imaging and audio is a backwater. While imaging features continue to evolve, audio innovations may be accelerating even faster to serve multiple emerging demands: active noise cancellation, projecting a sound stage from multiple speakers, 3D audio and ambisonics,… Read More
As chip design complexity increases, integration scales expand and time-to-market pressures grow, as a result, design verification has become increasingly challenging. In multi-FPGA environments, the complexity of design debugging and verification further escalates, making it difficult for traditional debugging methods… Read More
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