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Electronic Design Automation
Bruce Caryl is a Product Specialist with Siemens EDA
The most common way to evaluate a power distribution network is to look at its impedance over the effective frequency range. A lower impedance will produce less noise when transient current is demanded by the IC output buffers. However, this transient current needs to be provided… Read More
Can a combination of learning-based surrogate models plus reachability analysis provide first pass insight into extrema in circuit behavior more quickly than would be practical through Monte-Carlo analysis? Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys… Read More
Qualifying an AI-class RISC-V SoC demands proving that wide vectors, deep caches, and high-speed I/O operate flawlessly long before tape-out. At the recent Andes RISC-V Conference, Andes Technology and S2C showcased this by successfully booting a lightweight large language model (LLM) inference on a single S2C Prodigy™ S8-100… Read More
AI is the centerpiece of DAC this year. How to design chips to bring AI algorithms to life, how to prevent AI from hacking those chips, and of course how to use AI to design AI chips. In this latter category, there were many presentations, product announcements and demonstrations. I was impressed by many of them. But an important observation… Read More
Dan is joined by Dr. John Ferguson, Director of Product Management for the Calibre nmDRC and 3DIC related products for Siemens EDA. John has worked extensively in the area of physical design verification. Holding several patents, he is also a frequent author in the physical design and verification domain. Current activities … Read More
Keysight Showcases AI-Ready EDA and Multi-Physics Innovation at #62DAC
Design engineers attending #62DAC who focus on Design Data & IP Management, Analog, Mixed-Signal, RFIC, MMIC, or Multi-Physics should make booth #1408 a top destination. I had the opportunity to speak with Simon Rance, General Manager & Business… Read More
Clock Matters: What Infinisim Is Showcasing at DAC 2025
Optimize by Finding and Fixing Errors Across the Entire Clock Domain
The clock domain is the heartbeat of every high-performance SoC—and at DAC 2025, Infinisim is redefining how design teams approach clock optimization with speed, precision, and confidence.
If you’re… Read More
I wrote recently about a Siemens pre-announcement at DVCon on their directions in simulation+AI. On May 13th they officially announced a full spectrum of capabilities under the brand Questa One. Abhi Kolpekwar (VP/GM at Siemens EDA) more fully fleshed out the story for me. I asked why Siemens is late to this simulation+AI party.… Read More
Empyrean at DAC 2025: Full-Flow AMS/PMIC, SPICE Simulation, and AI-Accelerated Library Characterization
Empyrean returns to DAC 2025, showcasing our most advanced EDA solutions that power next-generation chip designs. This year, we spotlight three critical innovation areas:
Empyrean … Read More
For its 3rd DAC, Aniah comes to the show with a special treat for its customer : its new Analog Design Assistant, Amigo, makes analog and mixed-signal design engineers more productive every day. This product complements Aniah’s widely deployed, transistor-level verification solution, OneCheck.
Aniah is an EDA startup founded… Read More
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cHBM for AI: Capabilities, Challenges, and Opportunities