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EDA

Electronic Design Automation

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IP Traffic Control

IP Traffic Control
by Bernard Murphy on 04-14-2017 at 7:00 am
Categories: Dassault Systemes, EDA

From an engineering point of view, IP is all about functionality, PPA, fitness for use and track record. From a business/management point of view there are other factors, just as critical, that relate less to what the IP is and more to its correct management and business obligations. The problems have different flavors depending… Read More

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SPIE 2017 ASML and Cadence EUV impact on place and route

SPIE 2017 ASML and Cadence EUV impact on place and route
by Scotten Jones on 04-13-2017 at 7:00 am
Categories: Cadence, EDA, Events, Lithography

As feature sizes have shrunk, the semiconductor industry has moved from simple, single-exposure lithography solutions to increasingly complex resolution-enhancement techniques and multi-patterning. Where the design on a mask once matched the image that would be produced on the wafer, today the mask and resulting image … Read More

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Communication with Smart, Connected Devices and AI

Communication with Smart, Connected Devices and AI
by Daniel Payne on 04-12-2017 at 12:00 pm
Categories: AI, EDA, Events, General

I’ve lived and worked in Silicon Valley for 13 years, but since 1995 I’ve been in the Silicon Rainforest (aka Oregon) where the world’s number one semiconductor company Intel, has a large presence, along with dozens of smaller high-tech firms. In the past year I’ve started to attend events organized … Read More

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Synchronizing Collaboration

Synchronizing Collaboration
by Bernard Murphy on 04-12-2017 at 7:00 am
Categories: Consensia, Dassault Systemes, EDA, Events

Much though some of us might wish otherwise, distributed development teams are here to stay. Modern SoC design requires strength and depth in expertise in too many domains to effectively source from one site; competitive multi-national businesses have learned they can very effectively leverage remote sites by building centers… Read More

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Calibre Can Calculate Chip Yields Correlated to Compromised SRAM Cells

Calibre Can Calculate Chip Yields Correlated to Compromised SRAM Cells
by Tom Simon on 04-11-2017 at 12:00 pm
Categories: EDA, Siemens EDA

It seems like I have written a lot about SRAM lately. Let’s face it SRAM is important – it often represents large percentages of the area on SOC’s. As such, SRAM yield plays a major role in determining overall chip yields. SRAM is vulnerable to defect related failures, which unlike variation effects are not Gaussian in nature. Fabrication… Read More

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SPIE 2017: Irresistible Materials EUV Photoresist

SPIE 2017: Irresistible Materials EUV Photoresist
by Scotten Jones on 04-11-2017 at 7:00 am
Categories: EDA, Events, Foundries, Lithography

Irresistible Materials (IM) is a spin-out of the University of Birmingham in the United Kingdom that has been doing research on Photoresist and Spin-On Carbon hard masks for 10 years, most recently with Nano-C on chemistry development. IM has developed a unique EUV photoresist and they are now looking for partners to help bring… Read More

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Webinar: Chip-Package-System Design for ADAS

Webinar: Chip-Package-System Design for ADAS
by Bernard Murphy on 04-10-2017 at 7:00 am
Categories: Ansys, Inc., Automotive, EDA, Events

When thinking of ADAS from an embedded system perspective, it is tempting to imagine that system can be designed to some agreed margins without needing to worry too much about the details of the car environment and larger environment outside the car. But that’s no longer practical (or acceptable) for ADAS or autonomous systems.… Read More

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The Rise of Transaction-Based Emulation

The Rise of Transaction-Based Emulation
by Bernard Murphy on 04-06-2017 at 12:00 pm
Categories: EDA, Siemens EDA

One serious challenge to the early promise of accelerating verification through emulation was that, while in theory the emulator could run very fast, options for driving and responding to that fast model were less than ideal. You could use in-circuit emulation (ICE), connecting the emulation to real hardware and allowing you… Read More

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Machine Learning Accelerates Library Characterization by 50 Percent!

Machine Learning Accelerates Library Characterization by 50 Percent!
by Daniel Nenni on 04-06-2017 at 7:00 am
Categories: EDA, Solido

Standard cell, memory, and I/O library characterization is a necessary, but time-consuming, resource intensive, and error-prone process. With the added complexity of advanced and low power manufacturing processes, fast and accurate statistical and non-statistical characterization is challenging, creating the need … Read More

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When Will we Replace the 3.5 mm Jack in Modern Phones?

When Will we Replace the 3.5 mm Jack in Modern Phones?
by Eric Esteve on 04-05-2017 at 7:00 am
Categories: IP, Mobile, Synopsys

You have certainly experienced that modern mobile phones are used for more than phone calls and do not have room for multiple connectors. A new approach for audio connectivity is needed, allowing product designers to retire the 3.5mm jack. Considering the USB audio protocol to replace the analog audio solutions, typically using… Read More