What do drones, augmented reality devices, and 4K UHD TV have in common? They all include complex system-on-chips (SoCs) that must encode and decode, in real-time, data for increasingly higher definition video content. Verifying that these SoC designs are functionally correct is quite complex, but they must also function efficiently… Read More
Electronic Design Automation
High-Speed Equivalence Checking
Following on product introductions for simulation and prototyping, physical verification and implementation earlier in the year, Anirudh Devgan (Exec VP and GM at Cadence), the king of speed and parallelism has done it again, this time with logic equivalence checking (LEC). Cadence recently announced an advance to their well-known… Read More
Portable Stimulus Standard, What’s New from Cadence
I’ve been hearing about the Portable Stimulus Standard (PSS) since DAC 2016, so it’s helpful to get an update from EDA vendors on what their involvement level is with this emerging standard and how they see it helping design and verification engineers. Earlier in September I scheduled a conference call with Cadence… Read More
CDNLive Boston Keynote Address Highlights Emergence of Silicon Photonics
I had the pleasure of being able to attend the CDNLive event held in the Boston, MA area last month and I was pleasantly surprised to see that Cadence highlighted Silicon Photonics as one of its Keynote topics. MIT Professor Duane Boning gave an excellent overview of the current state of silicon photonics and why he believes it is time… Read More
How to Avoid Jeopardizing SoC Security when Implementing eSIM?
Smart card business is now more than 25 years old, we can assess that the semiconductor industry is able to protect the chips used for smart card or SIM application with a very good level (unfortunately, it’s very difficult to get access to the fraud percentage linked with smart cards, as bankers really don’t like to communicate on… Read More
Verification Trends: 2016
Periodically Mentor does us all a big favor by commissioning a survey of verification engineers across the world to illuminate trends in verification. This is valuable not only to satisfy our intellectual curiosity but also to help convince managers and finance mandarins that our enthusiasm to invest in new methods and tools … Read More
Semiconductor and EDA 2017 Update!
It really is an exciting time in semiconductors. The benchmarks on the new Apple A11 SoC and the Nvidia GPU are simply amazing. Even though Moore’s Law is slowing, the resulting chips are improving well above and beyond expectations, absolutely.
As I have mentioned before, non-traditional chip companies such as Apple, Amazon,… Read More
Walden Rhines on the Automotive Electronics Landscape
Mentor President and CEO Walden Rhines gave a comprehensive overview of the automotive electronics landscape at the Mentor Integrated Electrical Solutions Forum (IESF) in Plymouth, Mich., this week. A key focal point of Rhines’ comments was the twin industry disruptors: EVs and AVs.
A Texas Instruments alum, Rhines described… Read More
Clock Gating Optimization
You can save a lot of power in a design by gating clocks. For much of the time in a complex multi-function design, many (often most) of the clocks are toggling registers whose input values aren’t changing. Which means that those toggles are changing nothing functionally yet they are still burning power. Why not turn off those clock… Read More
IoT SoCs Demand Good Data Management and Design Collaboration
Design data management has always been important. Board designers have known this for decades as they had to have ways to keep all their discreet components organized and understood. Sourcing components is not easy as it means hours of reading and reviewing specifications, finding reliable sourcing partners and understanding… Read More


Weebit Nano Reports on 2025 Targets