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Big Data Analytics and Power Signoff at NVIDIA

Big Data Analytics and Power Signoff at NVIDIA
by Bernard Murphy on 11-23-2017 at 7:00 am

While it’s interesting to hear a tool-vendor’s point of view on the capabilities of their product, it’s always more compelling to hear a customer/user point of view, especially when that customer is NVIDIA, a company known for making monster chips.


A quick recap on the concept. At 7nm, operating voltages are getting much closer… Read More


The Elephant in the Autonomous Car

The Elephant in the Autonomous Car
by Bernard Murphy on 11-21-2017 at 7:00 am

I was driving recently on highway 87 (San Jose) and wanted to merge left. I checked my side-mirror, checked the blind-spot detector, saw no problems and started to move over – and quickly swerved back when a car shot by on my left. What went wrong? My blind-spot detection, a primary feature in ADAS (advanced driver assistance systems,… Read More


Mentor FINALLY Acquires Solido Design

Mentor FINALLY Acquires Solido Design
by Daniel Nenni on 11-20-2017 at 5:00 pm

I say finally because it was a long time coming… almost ten years to be exact. I started doing business development work for both Solido and Berkeley Design Automation about ten years ago and have been trying to put them together ever since. The synergy was obvious, like peanut butter and jelly. In fact, this is my third time … Read More


Tensilica Vision P6 DSP is Powering Huawei Kirin 970 Image

Tensilica Vision P6 DSP is Powering Huawei Kirin 970 Image
by Eric Esteve on 11-17-2017 at 7:00 am

Cadence has recently announced two key design-in for their Vision DSP IP family: MediaTek’s Helio P30 integrates the Tensilica Vision P5 DSP and HiSilicon has selected the Cadence® Tensilica® Vision P6 DSP for its 10nm Kirin 970 mobile application processor. The Kirin 970 being integrated into Huawei’s new Mate 10 Series mobile… Read More


Scale the tools not your expectations

Scale the tools not your expectations
by Frederic Leens on 11-16-2017 at 12:00 pm

The complexity of silicon chips is exploding. Actually, it has been growing at a tremendous speed for decades. So far, the semiconductor industry has been successful at providing new ways to master new levels of complexity, over and over again.

Standardizing hardware platforms, using higher-level languages with a knowledge… Read More


High-Level Design for Automotive Applications

High-Level Design for Automotive Applications
by Bernard Murphy on 11-16-2017 at 7:00 am

Automotive markets have added pressure on semiconductor/systems design through demand for ISO26262 compliance – this we all know. But they have also changed the mix of important design types. Once class of design that has become very significant in ADAS, and ultimately autonomous applications, is image signal processing (ISP).… Read More


Arm and Mentor Use DesignStart Program to Accelerate Proof-of-Concept for IoT Designs

Arm and Mentor Use DesignStart Program to Accelerate Proof-of-Concept for IoT Designs
by Mitch Heins on 11-15-2017 at 7:00 am

Sometimes the hardest thing about bringing a new idea to fruition is overcoming the inertia to get started with a proof-of-concept. You must be able to put together enough parts of the solution to prove to those controlling budgets that an idea has merit and is worth taking to the next level. It’s a bit of a chick-vs-egg scenario as … Read More


A Brief History of PSS at Breker

A Brief History of PSS at Breker
by Daniel Payne on 11-14-2017 at 12:00 pm

Verification engineers are hearing a lot about the Portable Stimulus Standard (PSS), and for good reason because it could potentially save them time and effort in doing their jobs much better. In order to get the big picture on what PSS is all about I contacted Adnan Hamid, founder and CEO of Breker Verification Systems, because … Read More


The Practice of Low Power Design

The Practice of Low Power Design
by Bernard Murphy on 11-14-2017 at 7:00 am

For any given design objective, there is what we in the design automation biz preach that design teams should do, and then there’s what designs teams actually do. For some domains, the gap between these two may be larger than others, but we more or less assume that methodologies which have been around for years and are considered to… Read More


Is there anything in VLSI layout other than “pushing polygons”? (3)

Is there anything in VLSI layout other than “pushing polygons”? (3)
by Dan Clein on 11-13-2017 at 12:00 pm

In late 1986 the Layout Project Leader of DSP96000 got married and left for a 6 months’ vacation so I inherited the biggest chip MSIL had in stock. Floorplanning such size chip was a challenge from day one. Even the 68030 SUN workstation was too slow. I started to ask around and going to demos for any other possible tool that can help me… Read More