DAC2025 SemiWiki 800x100
WP_Term Object
(
    [term_id] => 157
    [name] => EDA
    [slug] => eda
    [term_group] => 0
    [term_taxonomy_id] => 157
    [taxonomy] => category
    [description] => Electronic Design Automation
    [parent] => 0
    [count] => 4169
    [filter] => raw
    [cat_ID] => 157
    [category_count] => 4169
    [category_description] => Electronic Design Automation
    [cat_name] => EDA
    [category_nicename] => eda
    [category_parent] => 0
    [is_post] => 
)

Synopsys Announces IP Supporting 5G’s Game Changing Low Power IoT Spec

Synopsys Announces IP Supporting 5G’s Game Changing Low Power IoT Spec
by Tom Simon on 05-22-2020 at 6:00 am

5G NB IoT Processor from Synopsys

If you are like me, you will get a 5G phone because of the high bandwidth it offers. However, there is a lot more to 5G than just fast data. In fact, one of the appealing features of 5G is low bandwidth communication. This is useful for edge devices that perform infrequent and low volume data transfers and depend on long battery life. Prior… Read More


Atos Crafts NoC, Pad Ring, More Using Defacto

Atos Crafts NoC, Pad Ring, More Using Defacto
by Bernard Murphy on 05-21-2020 at 6:00 am

Mont Blanc

I’ve talked before about how Defacto provides a platform for scripted RTL assembly. Kind of a rethink of the IP-XACT concept but without need to get into XML (it works directly with SV), and with a more relaxed approach in which you decide what you want to automate and how you want to script it.

They’re hosting a webinar on May 28th 10-11am… Read More


Collaboration Flow for Moore’s Law versus More than Moore

Collaboration Flow for Moore’s Law versus More than Moore
by Herb Reiter on 05-20-2020 at 10:00 am

Figure 1 Foundry

The current Coronavirus crisis is inflicting a lot of pain on people, companies, and governments. I hope I am not getting in trouble with my reasoning, but if you look closely, there are also some “positives” to the Covid-19 crisis.

– It is stress-testing our infrastructure and telling us where we need to improve – as country,… Read More


Is Mutation Testing Worth the Effort? Innovation in Verification

Is Mutation Testing Worth the Effort? Innovation in Verification
by Bernard Murphy on 05-19-2020 at 6:00 am

innovation

Mutation testing is an intriguing idea, but is it useful? Paul Cunningham (GM of Verification at Cadence), Jim Hogan and I continue our series on novel research ideas, here looking at a paper examining the pros and cons of this topic. Feel free to comment if you agree or disagree.

The Innovation

This month’s pick is Which Software Read More


HCL Offers Tightly Integrated Design Management Solution for Virtuoso

HCL Offers Tightly Integrated Design Management Solution for Virtuoso
by Tom Simon on 05-18-2020 at 6:00 am

Flexium for Virtuoso

The road to a truly usable design management solution for electronic design has been a long and twisty one. Initially just handling EDA tool data was a struggle, let alone addressing mutli-user and multi-site needs. Of course, all along every EDA tool development company was internally using software revision control, which … Read More


WEBINAR: Moving UVM Verification Up To The Next Level

WEBINAR: Moving UVM Verification Up To The Next Level
by Daniel Nenni on 05-15-2020 at 9:00 am

PSS

Tom Fitzpatrick, a Strategic Verification Architect at Mentor, a Siemens Business, has worked on IEEE and Accellera standards like Verilog 1364, System Verilog 1800, UVM 1800.2 and is Vice Chair of the Portable Stimulus working group, so when I heard that he was doing a webinar on how PSS can be used to create better stimulus for … Read More


WEBINAR: Transitioning from Live to Virtual Events

WEBINAR: Transitioning from Live to Virtual Events
by Daniel Nenni on 05-15-2020 at 6:00 am

SemiWiki Webinar Banner

The foundation of SemiWiki.com has always been to transition live semiconductor related events to an easy to digest digital format via a worldwide online semiconductor community. SemiWiki is staffed by working semiconductor professionals that transform live events, press releases, whitepapers, webinars and other collateral… Read More


High Speed SerDes Design and Simulation Webinar Replay from Mentor

High Speed SerDes Design and Simulation Webinar Replay from Mentor
by Tom Simon on 05-14-2020 at 10:00 am

Mentor SerDes Simulation

Over the years SerDes (serializer/deserializer) based connections have proliferated into just about every connection within and among computing systems. Years ago, parallel interfaces were the most common method of moving data, but issues of signal integrity, synchronization and power simply became too much for the required… Read More


The Problem with Reset Domain Crossings

The Problem with Reset Domain Crossings
by Bernard Murphy on 05-14-2020 at 6:00 am

Reset button

Design complexities in reset, like everything else in big SoC designs, has become incredibly complex, for all sorts of reasons. Long, long ago reset was something you just did once, when you turned the power on. Turn on, then hold reset for some amount of time until everything is in a known starting state, and off you go. Nice and simple.… Read More


SEMI Takes the Jim Hogan and Simon Butler Conversation Virtual

SEMI Takes the Jim Hogan and Simon Butler Conversation Virtual
by Mike Gianfagna on 05-13-2020 at 10:00 am

Jim Simon

As I originally reported a few weeks ago, the Jim Hogan fireside chat with Methodic’s CEO and founder Simon Butler was moved to a virtual event on May 1. The event was produced by the Electronic System Design (ESD) Alliance, a SEMI Strategic Technology Community. Bob Smith, executive director of ESDA, moderated the event. I am happy… Read More