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CEO Interview: Pengwei Qian of SkillCAD

CEO Interview: Pengwei Qian of SkillCAD
by Daniel Nenni on 09-14-2020 at 6:00 am

IMG 4723

Pengwei Qian is the founder and CEO of SkillCAD, a grassroots EDA company that has amassed the most impressive customer list (60+ companies) I have experienced for a company of this size, absolutely.

Pengwei has a Bachelor’s degree in Physics and a Masters in Material Science from Fudan University and a Masters in Electronic Engineering… Read More


How HCL VersionVault Works – Directory Versioning

How HCL VersionVault Works – Directory Versioning
by Mike Gianfagna on 09-10-2020 at 10:00 am

Pieter Gosselink Senior Technical Support Engineer HCL Technologies

Last month, I discussed a webinar about HCL VersionVault – HCL VersionVault Delivers Version Control and More. This webinar introduced the HCL VersionVault product. This post will discuss a new video entitled “How HCL VersionVault Works – Directory Versioning.”

To recap, VersionVault delivers a lot of … Read More


Emulation as a Service Benefits New AI Chip

Emulation as a Service Benefits New AI Chip
by Bernard Murphy on 09-10-2020 at 6:00 am

Emulation as a Service

It’s no secret that innovation in AI chip architectures is on a tear. When you put together the spatial complexity of highly parallelized algorithms with the need to localize memory accesses on-chip to the greatest extent possible, we’re seeing a proliferation of all kinds of domain-specific architectures. Which in the normal… Read More


World’s Leading Chip Designers at IDEAS Digital Forum Show How to Streamline Design Flows and Reduce Design Cost

World’s Leading Chip Designers at IDEAS Digital Forum Show How to Streamline Design Flows and Reduce Design Cost
by Daniel Nenni on 09-03-2020 at 10:00 am

ANSYS IDEAS Airplane

Innovative Designs Enabled by Ansys Semiconductor

I’m excited to announce that general registration is now open for the new Ansys IDEAS Digital Forum!  IDEAS, hosted by Ansys Semiconductor, is a virtual gathering of top industry executives, thought leaders, and designers from some of the biggest IP, chip design, semiconductor… Read More


Lip-Bu Hyperscaler Cast Kicks off CadenceLIVE

Lip-Bu Hyperscaler Cast Kicks off CadenceLIVE
by Bernard Murphy on 09-02-2020 at 6:00 am

Lip Bu min

Lip-Bu (Cadence CEO) sure knows how to draw a crowd. For the opening keynote in CadenceLIVE (Americas) this year, he reprised his data-centric revolution pitch, followed by a talk from a VP at AWS on bending the curve in chip development. And that was followed by a talk by a Facebook director of strategy and technology on aspects of… Read More


WEBINAR: Addressing Verification Challenges in the Development of Optimized SRAM Solutions with surecore and Mentor Solido

WEBINAR: Addressing Verification Challenges in the Development of Optimized SRAM Solutions with surecore and Mentor Solido
by Daniel Nenni on 09-01-2020 at 2:00 pm

surecore solido webinar graphic

After spending a significant amount of my career in the IP library business it was an easy transition to Solido Design. I spent 10+ years traveling the world with CEO Amit Gupta working with the foundries and their top customers. In fact, the top 40 semiconductor companies use Solido. IP companies are also big Solido users including… Read More


Creating Analog PLL IP for TSMC 5nm and 3nm

Creating Analog PLL IP for TSMC 5nm and 3nm
by Tom Simon on 09-01-2020 at 6:00 am

PLL Optimizations

TSMC’s Open Innovation Platform’s main objective is to create and promote partnership for producing chips. This year’s OIP event included a presentation on the joint efforts of Silicon Creations, Mentor, a Siemens business and TSMC to produce essential PLL IP for 5nm and 3nm designs. The relentless push for smaller geometries… Read More


Can you really meet your SoC design schedule without a good GUI?

Can you really meet your SoC design schedule without a good GUI?
by Daniel Nenni on 08-31-2020 at 10:00 am

flow3 1

Talk to the members of a digital design team and you will always find two types of users. One who likes using the GUI while working on his design and the other who is passionate about using scripts and the command line options. This is akin to the two camps of users who either love either good old Vi/Vim or the ever versatile Emacs editor.… Read More


Data Management for the Future of Design

Data Management for the Future of Design
by Bernard Murphy on 08-31-2020 at 6:00 am

IP evolution min

Data management is one of those core technologies which is absolutely essential in any professional design operation. You must use a data management system; you just want it to be as efficient as possible. Most of us settled on one of a few commercial or open-source options. The problem seemed more or less solved. As usual in chip Read More


Making Full Memory IP Robust During Design

Making Full Memory IP Robust During Design
by Daniel Payne on 08-28-2020 at 10:00 am

64Mb SRAM example, memory IP

Looking at a typical SoC design today it’s likely to contain a massive amount of memory IP, like: RAM, ROM, register files. Keeping memory close to the CPU makes sense for the lowest latency and highest performance metrics, but what about process variations affecting the memory operation? At the recent DAC conference held… Read More