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Circuit Simulation Challenges to Design the Xilinx Versal ACAP

Circuit Simulation Challenges to Design the Xilinx Versal ACAP
by Daniel Payne on 06-24-2021 at 10:00 am

xilinx versal acap min

One of the most unique acronyms that I learned about this past year is ACAP from Xilinx, which stands for Adaptive Compute Acceleration Platform. At the recent Cadence LIVE event, I had the pleasure of watching Pei Yao, a Xilinx senior staff CAD engineer, as she talked about the challenges of getting all the analog and mixed-signals… Read More


EDA Design and Amazon Web Services (AWS)

EDA Design and Amazon Web Services (AWS)
by Daniel Payne on 06-21-2021 at 10:00 am

EC2 min

I first remember blogging about EDA in the cloud starting back in 2011, so what’s changed in the last 10 years you may ask? In 2011, it was basically a handful of EDA point tools running batch mode in the cloud, and you were on your own to integrate those into a coherent flow, so expect help from the CAD and IT departments for sure.… Read More


Connecting System Design to the Enterprise

Connecting System Design to the Enterprise
by Bernard Murphy on 06-16-2021 at 6:00 am

Connecting System Design to the Enterprise min

While systems design underpins the explosion in “smart everything”, it remains somewhat isolated from another explosion—the proliferation of tools for application lifecycle management (ALM). ALM tools are prevalent on the web, in the cloud and on our phones, to streamline product design and build, to track correspondence… Read More


Keynote from Google at CadenceLIVE Americas 2021

Keynote from Google at CadenceLIVE Americas 2021
by Kalar Rajendiran on 06-14-2021 at 10:00 am

CDNLive Americas 2021

Last week, Cadence hosted its annual CadenceLIVE Americas 2021 conference. Four keynotes and eighty-three different talks on various topics were presented. The talks were delivered by Cadence, its customers and partners.

One of the keynotes was from Partha Ranganathan, VP and Engineering Fellow from Google. His talk was titled,… Read More


Cadence adds a new Fast SPICE Circuit Simulator

Cadence adds a new Fast SPICE Circuit Simulator
by Daniel Payne on 06-02-2021 at 10:00 am

SPICE spectrum. Fast SPICE

In the early years of Cadence their growth was bolstered through many well-timed acquisitions, however over the last several years I’ve noticed a distinctively different trend where they have internally developed EDA tools. I had a Zoom call with Jay Madiraju from Cadence, who markets their newly announced Fast SPICE … Read More


Fuzzing to Validate SoC Security. Innovation in Verification

Fuzzing to Validate SoC Security. Innovation in Verification
by Bernard Murphy on 05-26-2021 at 6:00 am

Innovation image 2021 min

Fuzzing is to software verification what randomization is hardware verification. Can a fuzzing approach improve hardware security testing? Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO) and I continue our series on research ideas. As always, feedback… Read More


Cadence Extends Tensilica Vision, AI Product Line

Cadence Extends Tensilica Vision, AI Product Line
by Bernard Murphy on 05-11-2021 at 6:00 am

Tensilica vision min

Vision pipelines, from image signal processing (ISP) through AI processing and fancy effects (super-resolution, Bokeh and others) has become fundamental to almost every aspect of the modern world. In automotive safety, robotics, drones, mobile applications and AR/VR, what we now consider essential we couldn’t do without… Read More


Agile and Verification, Validation. Innovation in Verification

Agile and Verification, Validation. Innovation in Verification
by Bernard Murphy on 04-27-2021 at 6:00 am

Innovation image 2021

Agile methods in hardware design are becoming topical again. What does this mean for verification? Paul Cunningham (GM, Verification at Cadence) and I continue our series on research ideas. We’re also honored this month to welcome Raúl Camposano to our blog as a very distinguished replacement for Jim Hogan. As always, feedback… Read More


Podcast EP16: Hyperscale Computing & Changes in the Datacenter

Podcast EP16: Hyperscale Computing & Changes in the Datacenter
by Daniel Nenni on 04-16-2021 at 10:00 am

Dan is joined by Frank Schirrmeister, senior group director of solutions marketing at Cadence Design Systems, Frank has extensive experience in complex system design from his work at companies such as Cadence, Synopsys, Imperas and ChipVision. He has also advised Vayavya Labs and CriticalBlue.

Dan and Frank discuss the many… Read More


Cadence Dynamic Duo Upgrade Debuts

Cadence Dynamic Duo Upgrade Debuts
by Bernard Murphy on 04-08-2021 at 6:00 am

Dynamic Duo min

Cadence calls their hardware acceleration platforms, Palladium Z2 for fast pre-silicon hardware debug and Protium X2 for fast pre-silicon software validation, their Dynamic Duo. With good reason. Hardware acceleration is now fundamental to managing the complexity of verification and validation for large systems, hardware… Read More