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Design IP Sales Grew 19.4% in 2021, confirm 2016-2021 CAGR of 9.8%

Design IP Sales Grew 19.4% in 2021, confirm 2016-2021 CAGR of 9.8%
by Eric Esteve on 05-05-2022 at 6:00 am

Table IP 2020 2021 1

Design IP Sales reached $5.45B in 2021, or 19.4% YoY after 16% in 2020, on-sync with semiconductor growth of 26.2% in 2021 according to WSTS. IPnest has released the “Design IP Report” in May 2022, ranking IP vendors by category (CPU, DSP, GPU & ISP, Wired Interface, SRAM Memory Compiler, Flash Memory Compiler, Library and I/O,… Read More


Tensilica Edge Advances at Linley

Tensilica Edge Advances at Linley
by Bernard Murphy on 05-04-2022 at 6:00 am

NNE graphic min

The Linley spring conference this year had a significant focus on AI at the edge, with all that implies. Low power/energy is a key consideration, though increasing performance demands for some applications are making this more challenging. David Bell (Product Marketing at Tensilica, Cadence) presented the Tensilica NNE110… Read More


ML-Based Coverage Refinement. Innovation in Verification

ML-Based Coverage Refinement. Innovation in Verification
by Bernard Murphy on 04-27-2022 at 6:00 am

Innovation New

We’re always looking for ways to leverage machine-learning (ML) in coverage refinement. Here is an intriguing approach proposed by Google Research. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and now Silvaco CTO) and I continue our series on research… Read More


Cadence and DesignCon – Workflows and SI/PI Analysis

Cadence and DesignCon – Workflows and SI/PI Analysis
by Daniel Nenni on 04-02-2022 at 6:00 am

Clarity 3D solver 112Gbps

DesignCon 2022 is back to a live conference, from Tuesday, April 5th through Thursday, April 7th, at the Santa Clara Convention Center.

Introduction

DesignCon is a unique gathering in our industry.  Its roots incorporated a focus on complex design and analysis requirements of (long-reach) high-speed interfaces.  Technical… Read More


Symbolic Trojan Detection. Innovation in Verification

Symbolic Trojan Detection. Innovation in Verification
by Bernard Murphy on 03-30-2022 at 6:00 am

Innovation New

We normally test only for correctness of the functionality we expect. How can we find functionality (e.g. Trojans) that we don’t expect? Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and now Silvaco CTO) and I continue our series on research ideas. As always,… Read More


Leveraging Virtual Platforms to Shift-Left Software Development and System Verification

Leveraging Virtual Platforms to Shift-Left Software Development and System Verification
by Kalar Rajendiran on 03-15-2022 at 6:00 am

Extend Accuracy with Hybrid Platforms

Ever since the cost of development started growing exponentially, engineering teams have been deploying a shift-left strategy to software development and system verification. While this has helped contain cost and accelerated product development schedules, a shift-left strategy is not without challenges. A virtual platform… Read More


Using a GPU to Speed Up PCB Layout Editing

Using a GPU to Speed Up PCB Layout Editing
by Daniel Payne on 03-01-2022 at 10:00 am

3D PCB min

I can remember back in the 1980s how Apollo workstations were quite popular, because they accelerated the graphics display time for EDA tools much better than competitive hardware. Fast forward to 2022 and we have the same promise of speeding up EDA tools like PCB layout editing by using a GPU. At the 58th DAC there was a session called,… Read More


Dynamic Coherence Verification. Innovation in Verification

Dynamic Coherence Verification. Innovation in Verification
by Bernard Murphy on 02-16-2022 at 6:00 am

Innovation New

We know about formal methods for cache coherence state machines. What sorts of tests are possible using dynamic coherence verification? Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO) and I continue our series on research ideas. As always, feedback welcome.… Read More


How System Companies are Re-shaping the Requirements for EDA

How System Companies are Re-shaping the Requirements for EDA
by Kalar Rajendiran on 01-24-2022 at 10:00 am

Panelists and Cadence Moderator

As the oldest and largest EDA conference, the Design Automation Conference (DAC) brings the best minds together to present, discuss, showcase and debate the latest and greatest advances in EDA. It accomplishes this in the form of technical papers, talks, company booths, product pavilions and panel discussions.

A key aspect … Read More


2021 Retrospective. Innovation in Verification

2021 Retrospective. Innovation in Verification
by Bernard Murphy on 01-19-2022 at 6:00 am

Innovation image 2021

As we established last year, we will use the January issue of this blog to look back at the papers we reviewed last year. We lost Jim Hogan and the benefit of his insight early last year, but we gained a new and also well-known expert in Raúl Camposano (another friend of Jim). Paul (GM, Verification at Cadence), Raúl (Silicon Catalyst,… Read More