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Tempus: Delivering Faster Timing Signoff with Optimal PPA

Tempus: Delivering Faster Timing Signoff with Optimal PPA
by Mike Gianfagna on 10-12-2020 at 10:00 am

Tempus Delivering Faster Timing Signoff with Optimal PPA

In July, I explored the benefits of the new Cadence Tempus™ Power Integrity Solution. In that piece, I explored some of the unique capabilities of this new tool with Brandon Bautz, senior product management group director and Hitendra Divecha, product management director in the Digital & Signoff Group at Cadence. I recently… Read More


Digital Design Technology Symposium!

Digital Design Technology Symposium!
by Daniel Nenni on 10-07-2020 at 6:00 am

Synopsys Digital Design Symposium 2020
Virtual events are coming fast and furious. Even though we are sheltering there is still the need to pick and choose carefully because time really is big money inside the semiconductor design ecosystem, absolutely. 

Synopsys virtual events are high on my list for three reasons:

  1. They are very well organized and professionally
Read More

Arm Neoverse. Central to NVIDIA Strategy?

Arm Neoverse. Central to NVIDIA Strategy?
by Bernard Murphy on 10-06-2020 at 6:00 am

Arm Neoverse

I’ve covered Arm Neoverse updates a few times already, a span of products with application from the cloud through infrastructure to the edge. Logical strategy of course but Arm has been delivering some impressive wins suggesting this is more than just a loose marketing concept. Overlap with NVIDIA in datacenters and supercomputing… Read More


Veriest Meetup Provides Insights on Safety, Deadlocks

Veriest Meetup Provides Insights on Safety, Deadlocks
by Bernard Murphy on 10-01-2020 at 6:00 am

Veriest Logo min

I wasn’t familiar with Veriest, I’m guessing you may not be either. They are a design and verification services company based in the Tel Aviv area (Israel). The CEO, Moshe Zalcberg, was earlier GM for Cadence in Israel. Echoes for me of the early days working with Ajoy Bose in Interra. Veriest have a big emphasis in verification, for… Read More


Siemens PAVE360 Stepping Up to Digital Twins

Siemens PAVE360 Stepping Up to Digital Twins
by Bernard Murphy on 09-29-2020 at 6:00 am

Siemens PAVE360

The idea of a digital twin is simple enough. You use a digital model of a car, aircraft, whatever to test design ideas and prove your design will be robust across a wide range of scenarios before you commit millions of dollars and lives to proving out the real thing. As Siemens have accomplished in their PAVE360 platform. There are a … Read More


Executive Interview: Vic Kulkarni of ANSYS

Executive Interview: Vic Kulkarni of ANSYS
by Daniel Nenni on 09-23-2020 at 6:00 am

Ansys Ideas 1

On the eve of the Innovative Designs Enabled by Ansys Semiconductor (IDEAS) Forum I spoke with Vic on a range of topics including his opening keynote: Accelerating Moore and Beyond Moore with Multiphysics. You can register here

Vic Kulkarni is Vice President and Chief Strategist, Semiconductor Business Unit, Ansys, San Jose.… Read More


AI/ML SoCs Get a Boost from Synopsys IP on TSMC’s 7nm and 5nm

AI/ML SoCs Get a Boost from Synopsys IP on TSMC’s 7nm and 5nm
by Mike Gianfagna on 09-22-2020 at 10:00 am

AIML SoCs Get a Boost from Synopsys IP on TSMCs 7nm and 5nm

This is another installment covering TSMC’s very popular Open Innovation Platform event (OIP), held on August 25. This event presents a diverse and high-impact series of presentations describing how TSMC’s vast ecosystem collaborates with each other and with TSMC. The presentation covered here from Synopsys focuses on the… Read More


Anirudh CadenceLIVE Plays Up Computational Software

Anirudh CadenceLIVE Plays Up Computational Software
by Bernard Murphy on 09-17-2020 at 6:00 am

Anirudh min

Cadence has clearly found its groove with Intelligent System Design, something that Lip-Bu reinforced in the CadenceLIVE kickoff keynote on Tuesday, August 11th. Anirudh Devgan, president of Cadence, continued to discuss the theme in his keynote on Wednesday, August 12th with his equally consistent subtitle—”Strength… Read More


AI in Korea. Low-Key PR, Active Development

AI in Korea. Low-Key PR, Active Development
by Bernard Murphy on 09-15-2020 at 6:00 am

korea ai min

Based on press coverage and technical paper volume, you could be forgiven for thinking that Korea had decided to take a pass on AI mania, or maybe just to dabble a little here and there to stay abreast of trends. But you’d be wrong. Korea is very active in AI; they don’t feel a need to trumpet what they’re doing from the rooftops. If you … Read More


Emulation as a Service Benefits New AI Chip

Emulation as a Service Benefits New AI Chip
by Bernard Murphy on 09-10-2020 at 6:00 am

Emulation as a Service

It’s no secret that innovation in AI chip architectures is on a tear. When you put together the spatial complexity of highly parallelized algorithms with the need to localize memory accesses on-chip to the greatest extent possible, we’re seeing a proliferation of all kinds of domain-specific architectures. Which in the normal… Read More