Webinar: PICMG COM-HPC® – New Open Standard for High Performance Compute Modules

Webinar: PICMG COM-HPC® – New Open Standard for High Performance Compute Modules
by Mike Gianfagna on 09-22-2021 at 10:00 am

Webinar PICMG COM HPC® New Open Standard for High Performance Compute Modules

The subject of this webinar is focused on the new COM-HPC standard from PICMG, a nonprofit consortium of companies and organizations that collaboratively develop open standards for high performance telecommunications, military, industrial, and general-purpose embedded computing applications. A computer-on-module … Read More


Build a Sophisticated Edge Processing ASIC FAST and EASY with Sondrel

Build a Sophisticated Edge Processing ASIC FAST and EASY with Sondrel
by Mike Gianfagna on 09-16-2021 at 6:00 am

Build a Sophisticated Edge Processing ASIC FAST and EASY with Sondrel

Building a custom chip for edge computing applications can be quite daunting. For starters, there is very little power available at the edge, so energy efficiency will be top of mind. The whole point of edge processing is to off-load the time-consuming and costly process of sending data to the cloud, so substantial processing capability… Read More


Webinar – Why Keeping Track of IP in the Enterprise Really Matters

Webinar – Why Keeping Track of IP in the Enterprise Really Matters
by Mike Gianfagna on 08-30-2021 at 10:00 am

Webinar – Why Keeping Track of IP in the Enterprise Really Matters

Everyone knows IP is an important asset for the enterprise. You spend a lot of money on IP licenses. You try to keep track of who bought what as buying the same thing twice is painful. You wonder if you have the latest version of an IP, especially if it’s part of mission-critical functionality. If you’re a good corporate citizen, you … Read More


Sondrel Creates a Unique Modelling Flow to Ensure Your ASIC Hits the Target

Sondrel Creates a Unique Modelling Flow to Ensure Your ASIC Hits the Target
by Mike Gianfagna on 08-19-2021 at 10:00 am

Sondrel Creates a Unique Modelling Flow to Ensure Your ASIC Hits the Target

Designing an ASIC is little bit like trying to hit the bullseye, in the dark. I’ve spent several decades in the ASIC business I can tell you this is what it’s like from first-hand experience. When the design team sets out to build a custom chip to make their product better, faster, more robust, etc. (pick the words you like), there is … Read More


Flex Logix and Socionext are Revolutionizing 5G Platform Design

Flex Logix and Socionext are Revolutionizing 5G Platform Design
by Mike Gianfagna on 08-17-2021 at 10:00 am

Flex Logix and Socionext are Revolutionizing 5G Platform Design

The world is buzzing with 5G deployment news. It seems the entire planet anxiously awaits the step function improvement in bandwidth and latency promised by this new technology. When there is additional deployment, it’s news. When there are new chipsets and devices supporting the standard it’s news. But when there is a fundamental… Read More


You Get What You Measure – How to Design Impossible SoCs with Perforce

You Get What You Measure – How to Design Impossible SoCs with Perforce
by Mike Gianfagna on 08-16-2021 at 10:00 am

You Get What You Measure – How to Design Impossible SoCs with Perforce

We all know that a trusted, reliable, and well-integrated design flow is critical to successful advanced SoC design. So is proven, robust IP. While these elements are necessary for success, they are not, by themselves, sufficient. There are other aspects to consider – measurement, tracking and coordination. We’ve all heard … Read More


Samtec Dominates DesignCon 2021

Samtec Dominates DesignCon 2021
by Mike Gianfagna on 08-15-2021 at 6:00 am

Samtec Dominates DesignCon 2021

DesignCon has grown over the years to become a true system design show. The show’s tagline is WHERE THE CHIP MEETS TO BOARD. This is just the beginning. Besides the chip and the board there are all the challenges, opportunities, and options to get signals reliably propagated throughout the entire system. Power, signal integrity,… Read More


TSMC Explains the Fourth Era of Semiconductor – It’s All About Collaboration

TSMC Explains the Fourth Era of Semiconductor – It’s All About Collaboration
by Mike Gianfagna on 08-13-2021 at 6:00 am

TSMC Explains the Fourth Era of Semiconductor – Its All About Collaboration

The 32nd VLSI Design/CAD Symposium  just occurred in a virtual setting. The theme of the event this year was “ICs Powering Smart Life Innovation”. There were many excellent presentations across analog & RF, EDA & testing, digital & system, and emerging technology. There were also some excellent keynotes, and this… Read More


Is EDA Growth Unstoppable?

Is EDA Growth Unstoppable?
by Mike Gianfagna on 07-15-2021 at 6:00 am

Is EDA Growth Unstoppable

SemiWiki has covered the Q2, Q3 and Q4 ESD Alliance quarterly revenue reports previously. The Q2 2020 report suggested that EDA had COVID immunity. The Q3 2020 report inspired an Up and to the Right comment. The Q4 2020 report  demanded a Juggernaut label.  And now the Q1 2021 report posts yet more record-breaking growth. This is … Read More


Get a Jump-Start on Your Next IoT Design with Sondrel’s SFA 100

Get a Jump-Start on Your Next IoT Design with Sondrel’s SFA 100
by Mike Gianfagna on 07-14-2021 at 6:00 am

Get a Jump Start on Your Next IoT Design with Sondrels SFA 100

The concept of platform-based design has been around a long time. I can recall Nokia’s early cell phone products used the strategy very effectively. They were able to turn out new phones quickly by leveraging their existing chip design as a baseline on which to add features. This is commonplace today but was innovative at that time.… Read More