NetApp’s FlexGroup Volumes – A Game Changer for EDA Workflows

NetApp’s FlexGroup Volumes – A Game Changer for EDA Workflows
by Mike Gianfagna on 12-23-2020 at 10:00 am

NetApps FlexGroup Volumes – A Game Changer for EDA Workflows

In my prior post on NetApp, I discussed how the company’s FlexCache technology can keep distributed design teams in sync. Coordination and collaboration are critical elements of any complex design project. The ability to deliver results quickly while managing the massive amounts of data is also a critical element of success.… Read More


Flex Logix Expands Its eFPGA Footprint with a Low Power Comms Design Win from OpenFive

Flex Logix Expands Its eFPGA Footprint with a Low Power Comms Design Win from OpenFive
by Mike Gianfagna on 12-21-2020 at 10:00 am

Flex Logix Expands Its eFPGA Footprint with a Low Power Comms Design Win from OpenFive

Embedded FPGA use is on the rise. The programmability offered by this kind of IP finds many applications in complex SoCs. There was a recent announcement that OpenFive had licensed Flex Logix’s eFPGA to develop a low power communications SoC. The part required a large eFPGA. The news was reported on SemiWiki here. This announcement… Read More


Silicon Catalyst’s Semi Industry Forum – All-Star Cast Didn’t Disappoint

Silicon Catalyst’s Semi Industry Forum – All-Star Cast Didn’t Disappoint
by Mike Gianfagna on 12-18-2020 at 10:00 am

Silicon Catalysts Semi Industry Forum – All Star Cast Didnt Disappoint

A few weeks ago I wrote about an upcoming event Silicon Catalyst was hosting, the Semiconductor Industry Forum – A View to the Future. I mentioned a high-profile group of presenters: Don Clark, Contributing Journalist, New York Times as moderator;  Mark Edelstone, Chairman of Global Semiconductor Investment Banking, Morgan… Read More


Synopsys is Extending CXL Applications with New IP

Synopsys is Extending CXL Applications with New IP
by Mike Gianfagna on 12-17-2020 at 10:00 am

CXLs busy timeline

Compute Express Link (CXL), a new open interconnect standard, targets intensive workloads for CPUs and purpose-built accelerators where efficient, coherent memory access between a host and device is required. A consortium to enable this new standard is in place, and a lot of heavy hitters are behind the standard, including … Read More


Close the Year with Cliosoft – eBooks, Videos and a Fun Holiday Contest

Close the Year with Cliosoft – eBooks, Videos and a Fun Holiday Contest
by Mike Gianfagna on 12-16-2020 at 6:00 am

Close the Year with Cliosoft – eBooks Videos and a Fun Holiday Contest

‘Tis the season, a time when a lot of companies summarize the year, send out holiday greetings and generally wind down until after the New Year. That’s not the case at Cliosoft.  Their marketing machine has been in full gear with lots of new, useful and compelling content. I’ll provide a round-up of what’s happening. You can close… Read More


Alphawave IP is Enabling 224Gbps Serial Links with DSP

Alphawave IP is Enabling 224Gbps Serial Links with DSP
by Mike Gianfagna on 12-14-2020 at 10:00 am

Alphawave IP is Enabling 224Gbps Serial Links with DSP

Alphawave IP is a new member of the SemiWiki community. You can learn about the company and their CEO, Tony Pialis in this interview by Dan Nenni. Design & Reuse did a virtual IP-SOC Conference recently and Tony presented. The D&R event had a very strong lineup of presenters. They supplemented the prepared video presentations… Read More


Altair Expands Its Technology Footprint with I/O Profiling from Ellexus

Altair Expands Its Technology Footprint with I/O Profiling from Ellexus
by Mike Gianfagna on 12-09-2020 at 10:00 am

Altair Expands Its Technology Footprint with IO Profiling from Ellexus

Altair is a broad-based technology company with an ambitious vision. As stated on their website: Our comprehensive, open-architecture solutions for data analytics, computer-aided engineering, and high-performance computing (HPC), enable design and optimization for high performance, innovative, and sustainable productsRead More


The Practitioners View of DAC – Design, IP and Embedded

The Practitioners View of DAC – Design, IP and Embedded
by Mike Gianfagna on 12-07-2020 at 10:00 am

The First DAC

Next year will mark the 58th year for the Design Automation Conference. It’s hard to wrap your head around the fact this event dates back to 1964, when rock ‘n roll was new, cars were big and computers were even bigger. In its early days, the event was called the Design Automation Workshop. Pictured above is the cover of the very first… Read More


Chip Startups are Succeeding with Silicon Catalyst and Partners Like Arm

Chip Startups are Succeeding with Silicon Catalyst and Partners Like Arm
by Mike Gianfagna on 12-04-2020 at 6:00 am

Chip Start Ups are Succeeding with Silicon Catalyst and Partners Like Arm

Earlier this year I wrote about Silicon Catalyst and a potent new addition to their In-Kind and Strategic Partner Programs, Arm. Fast-forward to today and there are real results to report.  As I mentioned in the prior post, Silicon Catalyst provides a unique incubator environment which includes deeply discounted technology … Read More


Analog Bits is Supplying Analog Foundation IP on the Industry’s Most Advanced FinFET Processes

Analog Bits is Supplying Analog Foundation IP on the Industry’s Most Advanced FinFET Processes
by Mike Gianfagna on 12-02-2020 at 10:00 am

Analog Bits is Supplying Analog Foundation IP on the Industrys Most Advanced FinFET Processes

The industry recently concluded a series of technology events for the all the major foundries.  Done as virtual events this year, each one provided a significant update on technology platforms, roadmaps and ecosystem partnerships. These events are quite valuable to chip design teams who need to be aware of the latest in process,… Read More