In previous design generations interconnect could safely be modeled by extraction using just R and C values. Parasitics in interconnect are important because they can affect the operating frequency or phase error in circuits like VCO’s. The need to model parasitics properly in wires is just as applicable in PA’s, LNA’s and for… Read More
Author: Daniel Nenni
Celebrating 50 Billion ARM Powered Chips!
In case you have not seen it yet there is a website named 50BillionChips where you can follow the journey of ARM. This goes quite well with the brief history of ARM we wrote last year in preparation for our bookFabless: The Transformation of the Semiconductor Industry. ARM was a big part of that transformation of course.… Read More
A Brief History of STMicroelectronics
STMicroelectronics is the result of the 1987 marriage between famed semiconductor companies SGS Microelettronica of Italy and Thomson-CSF Semiconductor of France. You may recognize the name SGS-Thomson which was replaced by STMicroelectronics in 1998. After the merger SGS-Thomson was ranked as number 14 in the top 20 semiconductor… Read More
A Brief History of Kandou Bus
Kandou Bus uses a novel form of spatial coding to transmit data between wired chips. The main idea is to introduce correlations between the signals sent on the interface, and choose the correlations judiciously to lower the power consumption, increase the speed, and lower the footprint. It is a generalization of differential … Read More
Verifying DRC Decks and Design Rule Specifications
DRVerify is part of the iDRM design rule compiler platform from Sage DA, something that I have been personally involved with for the past three years. DRVerify is mainly used to verify third party design rule check (DRC) decks and ensure that they correctly, completely and accurately represent the design rule specification. In… Read More
Dr. Cliff Hou, TSMC VP of R&D, Keynote
This will be my 30[SUP]th[/SUP] Design Automation Conference. I know this because my first DAC was the same year I got married and forgetting how many years you have been married can cost you half your stuff. I have known Cliff Hou for half of that time and he has proven to be one of the most humble and honorable men I have worked with, definitely.… Read More
Intel 14nm Delayed Again?
From the sources in which I confirmed the last Intel 14nm delay, I just confirmed another. Intel 14nm is STILL having yield problems. Remember Intel bragging about 14nm being a full node and deriding TSMC because 16nm is “just” 20nm with FinFETs added? Judging by the graph, clearly FinFETs are not the problem here. … Read More
Has LinkedIn Jumped the Shark?
LinkedIn is without a doubt the number one social network for semiconductor professionals. Based on my experience, the big LinkedIn boom came with the massive unemployment during the Great Recession of 2009. In my estimate, unemployment was 12%+ at the high point in Silicon Valley and resumes clogged the internet with LinkedIn… Read More
Cliosoft Grows Again!
Cliosoft was one of the first companies to work with SemiWiki so they are an integral part of our amazing growth and we are part of theirs. I remember talking to Srinath Anantharaman (Cliosoft CEO) for the first time and discussing the goals of working together. It was simple really, there was disinformation in the market about Cliosoft… Read More
DesignCon 2014 AMS Panel Report
DesignCon 2014 was very crowded! I have not seen the attendance numbers but as the first conference of the New Year it was very encouraging. The strength of the fabless semiconductor ecosystem is collaboration and face-to-face interactions are the most valuable, absolutely.
The session I moderated was on Mixed Signal Design … Read More
The Data Crisis is Unfolding – Are We Ready?