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WAVE-J: Redefining High-Performance JPEG for the 8K Era

WAVE-J: Redefining High-Performance JPEG for the 8K Era
by Daniel Nenni on 08-03-2026 at 6:00 am

Wave J JPEC Codec Chips&Media

Chips&Media WAVE-J is a high-performance JPEG codec intellectual property core designed for advanced imaging systems that require very large image support, high throughput, flexible pixel formats, and integrated pre- and post-processing. It succeeds the CODAJ12V architecture while retaining compatibility with … Read More


CEO Interview with Joseph Krause of Radical AI

CEO Interview with Joseph Krause of Radical AI
by Daniel Nenni on 08-02-2026 at 6:00 pm

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Joseph F. Krause is an American materials scientist, entrepreneur, and U.S. Army National Guard veteran. He is the cofounder and CEO of Radical AI, a New York deep-tech startup founded to accelerate the discovery of advanced materials.

Before Radical AI, Krause conducted nanomaterials research at Rice University, worked on… Read More


CEO Interview with Chuck McClish of of Lattrex Inc.

CEO Interview with Chuck McClish of of Lattrex Inc.
by Daniel Nenni on 08-02-2026 at 3:00 pm

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Chuck McClish is the founder of Lattrex Inc., a fabless semiconductor startup building Kyttar, an asynchronous, clockless reconfigurable processor for real-time signal processing. He spent 15 years at Microchip Technology in chip design and verification, working across RTL design, UVM verification, synthesis, place-and-route,… Read More


Podcast EP358: How Custom Silicon Development Allowed Cisco to Fuel New Innovation for Its Customers

Podcast EP358: How Custom Silicon Development Allowed Cisco to Fuel New Innovation for Its Customers
by Daniel Nenni on 07-31-2026 at 2:00 pm

Daniel is joined by Nick Kucharewski Senior Vice President and General Manager for Cisco’s silicon development organization. In this role he is responsible for the end-to-end strategy, cross-functional execution, organization alignment, and product roadmap for Silicon One, Cisco’s uniquely scalable and programmable … Read More


DAC 2026: The Trouble with John Cooley’s Troublemaker Panel

DAC 2026: The Trouble with John Cooley’s Troublemaker Panel
by Mike Gianfagna on 07-31-2026 at 10:00 am

DAC 2026 The Trouble with John Cooley’s Troublemaker Panel

For quite a few years, John Cooley has hosted the Troublemaker Panel at DAC. The event consists of a panel of senior executives from the EDA industry. John Cooley asks his readers for “edgy” questions to ask the panelists and on event day, he does just that. Those with complete responses that are backed with real data from real customers… Read More


The Difference Between TSMC CoWoS-S and CoWoS-R

The Difference Between TSMC CoWoS-S and CoWoS-R
by Daniel Nenni on 07-31-2026 at 6:00 am

The Difference Between CoWoS S and CoWoS R

CoWoS-S and CoWoS-R are two versions of TSMC’s Chip-on-Wafer-on-Substrate advanced packaging platform. Both technologies are designed to combine high-performance processors, chiplets and high-bandwidth memory, or HBM, within a single package. This shortens the electrical connections between computing and memory components,… Read More


From Photonics Precision to Repeatable Evidence

From Photonics Precision to Repeatable Evidence
by Moh Kolb on 07-30-2026 at 2:00 pm

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Why Optical Probing Is Becoming a Manufacturing Boundary for Silicon Photonics

Silicon photonics has already shown that extremely precise optical alignment is possible.

In controlled laboratory environments, engineers can align fibers, waveguides, grating couplers, edge couplers, modulators, detectors, and electrical… Read More


Industry’s First Certified Automotive Grade PUF for Software Defined Vehicles

Industry’s First Certified Automotive Grade PUF for Software Defined Vehicles
by Kalar Rajendiran on 07-30-2026 at 10:00 am

Automotive PUF Premium System Level Diagram

Software defined vehicles (SDVs) are transforming the automotive industry. Today’s vehicles are connected computing platforms that rely on advanced processors, artificial intelligence (AI), over the air (OTA) software updates, cloud services, and vehicle to everything (V2X) communications. Every electronic … Read More


Formal Acceleration on FPGA. Innovation in Verification

Formal Acceleration on FPGA. Innovation in Verification
by Bernard Murphy on 07-30-2026 at 6:00 am

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Extending hardware acceleration to formal verification is a powerful idea to extend hardware acceleration to a verification domain that has not got much attention for acceleration. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and lecturer at Stanford,… Read More


Previewing FMS 2026: The Next Frontier of Enterprise Memory, CXL, and AI-Era Storage

Previewing FMS 2026: The Next Frontier of Enterprise Memory, CXL, and AI-Era Storage
by Daniel Nenni on 07-29-2026 at 10:00 am

FMS 2026 Partner socials (5) (1)

For anyone tracking enterprise infrastructure, the storage landscape is moving at a breakneck pace. The explosive growth of generative AI, multi-million token context windows, and massive data-centric workloads have pushed traditional memory and storage architectures to their absolute limits.

This August, the industry… Read More