See Autonomous Chip Design in Action with ChipAgents at DAC 2026Making the AI wave at DAC 2026 in…Read More
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From Detection to Safety: Reframing Fault Simulation for Functional SafetyIn the early 1980s, when computer-aided engineering (CAE),…Read More
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Undo gives AI coding agents the runtime context they need to solve hard problems in complex software and system verification workflows Undo’s technology records complete program execution, allowing engineers and AI coding agents to understand exactly what happened during execution rather than inferring behavior from source… Read More
AI-driven semiconductor systems are the next major transformation in chip design and manufacturing. The central idea is that semiconductor workflows are becoming too complex, too data-intensive, and too time-sensitive to be managed only through traditional human-driven engineering processes. Modern chips now involve… Read More
Dr. Albert Liu is the Founder and CEO of Kneron, a full-stack edge AI company pioneering next-generation Neural Processing Unit (NPU) architectures and localized AI infrastructure.
Widely recognized as a pioneer in NPU architecture, Dr. Liu has spent decades advancing AI hardware, semiconductor systems, and computer vision… Read More
Ebrahim Hussain is Co-Founder of Architect Labs, where he is building AI-powered systems to accelerate semiconductor design and engineering. He brings deep expertise in AI and hardware development, with a focus on transforming how advanced chips are designed and brought to market.
Aaditya (Aadi) Subedi is Co-Founder of … Read More
Daniel is joined by Sagar Saxena, Senior Product Engineer at Siemens EDA specializing in computational lithography, optical proximity correction (OPC), and advanced patterning solutions for leading-edge semiconductor manufacturing. Sagar has led the development and deployment of advanced OPC technologies, including… Read More
Mark Ren has 26 years of EDA and AI R&D experience spanning IBM Research and NVIDIA Research, driving design automation innovations that power modern chip design. He received the IBM Corporate Award for contributions to the design closure for high-performance microprocessors. At NVIDIA, he helped establish the company
TSMC’s A16 technology, presented as Paper T1.5 at the June 2026 IEEE/JSAP VLSI Symposium, marks the company’s first angstrom-class CMOS platform combining enhanced nanosheet gate-all-around transistors with backside power delivery. The key integration feature is Super Power Rail, or SPR, which TSMC describes as a backside… Read More
The semiconductor landscape is currently undergoing a structural transformation as the “Data-Centric Shift” moves the industry’s center of gravity from smartphones toward High-Performance Computing (HPC) and AI infrastructure.
This transition is clearly validated by TSMC’s 2025 filings, which show… Read More
Electronic Design Automation, or EDA, is the software infrastructure that transforms a hardware specification into a manufacturable integrated circuit. At advanced process nodes, the problem is no longer simply drawing transistors or connecting gates. A modern system-on-chip contains billions of standard cells, hundreds… Read More
Over the last year, the EDA industry has started using a new vocabulary: agents, super agents, mental models, native skills, playbooks, RAG, MCP, autonomous workflows, and AI-first design.
The language is new, but the motivation is familiar to anyone who has worked in chip design.
Design complexity keeps increasing. The number… Read More
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Consolidation and Competition: Who is Winning the $4.5 Billion Interface IP Race?