I recently covered what Samtec was doing at DesignCon 26. Samtec has a tendency to dominate any show it attends in multiple dimensions. The prior post focused on the company’s contributions to the technical agenda and the high-profile experts in attendance. While all that is interesting and valuable, attending a large show like… Read More
PowerArtist RTL Power Estimation Folds into KeysightBack in the late 1990s, Sente launched a…Read More
Intel Foundry Expands the 18A Platform with 18A-P and Demonstrates Long-Term Technology Leadership at VLSI 2026At the 2026 VLSI Symposium, Intel Foundry provided…Read More
GPU-native mask rule checking eliminates the curvilinear mask rule check bottleneckAs semiconductor manufacturing pushes toward advanced nodes with…Read More
A tower-like heterogeneous packaging architecture for the AI era VEMC: The Vertical System…Read MoreAvailable Is Not In Control: Balancing Output, Quality, and Risk in High-Volume Fabs
A deposition chamber drops out of production at 2 a.m. Forty minutes later it is back, the dashboard flips from red to green, and two people want opposite things. The operations-center operator has a step starving downstream and wants the tool dispatched now. The module’s shift group leader wants test wafers run and confirmed… Read More
AION Silicon: Architecting Smarter SoCs with RISC-V: Balancing Performance, Flexibility, and Risk
As semiconductor complexity accelerates across AI, automotive, and edge computing markets, SoC architecture has become a critical determinant of commercial success. Modern silicon programs must simultaneously achieve aggressive performance-per-watt targets, support evolving workloads, and maintain manageable development… Read More
AI-native Virtual Chiplet Eco-systems: Shift Left, Shift Up, and Shift Out to accelerate Chiplet adoption
Systems-in-package (SIPs) with 2.5D and 3D heterogenous integration, consisting of multiple dies and chiplets deliver 10x more functionality than traditional monolithic chips. This capability enables innovative solutions for diverse needs in scientific computing, automotive, edge computing, and aerospace/defense.… Read More
CEO Interview with Mark Goranson of EMASS
Mark Goranson is the Chief Executive Officer EMASS, a wholly owned subsidiary of Nanoveu, for which they serve as the semiconductor technology division. With more than 45 years in the global semiconductor industry, he has held senior leadership roles at companies including Intel, Freescale Semiconductor, and ON Semiconductor.… Read More
CEO Interview with James Regan of Oriole
James Regan is a seasoned technology executive and physicist with over 30 years in optical communications. As Co-Founder and CEO of Oriole, he is pioneering the next radical breakthrough in advanced optical networking systems for AI. James has a proven track record of transforming university research into globally impactful… Read More
Podcast EP351: A Detailed Overview of the Emerging Standards for 400G with Kent Lusted
Daniel is joined by Kent Lusted, a Distinguished Architect at Synopsys and an integral part of the company’s Ethernet IP design team. He has been an active contributor and member of the IEEE 802.3 Ethernet PHY standards development leadership team for more than 15 years. Prior to Synopsys, Kent worked at Intel for 30+ years, focused… Read More
The Yield Partnership: Intel and PDF Solutions Tackle Advanced Nodes
One of the most difficult things to do in life is ask for help. This is inherently a big problem in the semiconductor industry dating back to the IDM days where silos of secrecy were established. As a result Intel has struggled with yield since the 14nm FinFET process nodes.
On the outside PDF Solutions is a publicly traded semiconductor… Read More
Webinar: Faster Design Spec to Implementation using IP-XACT
As SoC design flows grow increasingly complex, IP-XACT has become a cornerstone standard throughout the entire development lifecycle: from architecture specification to design assembly and verification. Its growing adoption is reflected in the standard’s continuous evolution, from the 2009 release through 2014… Read More
Webinar: Caspia Shows You How to Fix Security Flaws Before It’s Too Late
I recently posted an overview of an upcoming webinar from Caspia Technologies. That post provides background on the excellent speakers who will present and an overview of the topics they will cover. I recently had the opportunity to attend a dry run of the entire event. The details presented are quite impactful, so I thought I’d… Read More


Available Is Not In Control: Balancing Output, Quality, and Risk in High-Volume Fabs