Last year I wrote about Arteris’ introduction of multi-die support for coherent NoCs. This is a very big deal because hyperscalers and OEMs are now building large systems that depend on multi-chiplet architectures and require efficient traffic management between chiplets, in one case as many as 12 compute, fabric/cache and … Read More
Why Semiconductor AI Starts with Data, Not AlgorithmsThe next gains from AI in semiconductors will…Read More
Why AI Security Starts at the Chip LevelArtificial intelligence is becoming part of the infrastructure…Read More
CTO Interview with Sirish Munipalli of Moores Lab AISirish Munipalli is Co-Founder and CTO of Moores…Read More
What DARPA Taught Me About Building Trust into SiliconBy Sajeed Mohammad The most memorable slide I…Read More
Delivering Silicon Systems Through AI Disruption, Part 1: Writing the ScoreScore: the written music for an orchestra, with…Read MoreThe Industry Challenge: AI Is Forcing Semiconductor Innovation Beyond the Chip
Applied Materials President and CEO Gary Dickerson with the EPIC Center founding partners on October 12, 2026, in Sunnyvale, CA. (Tomas Ovalle/AP Content Services for Applied Materials, Inc.)The bottlenecks are becoming interconnected
Artificial intelligence is changing what the semiconductor industry must deliver. … Read More
Who Gets to Move the Recipe? How Autonomous Agents Earn Decision Authority in the Fab
by Ajay Kumar Govindaram
There’s a question I’ve started asking at every agentic AI demo I sit through, and it has a clean answer in every fab on earth: who is allowed to change the recipe? In a semiconductor factory, that was settled decades ago. A person doesn’t touch a production recipe because they feel confident.… Read More
Smoothing the Quantum Path: ASML and Xanadu Target Photon Loss
ASML’s decision to collaborate with Xanadu targets one of photonic quantum computing’s most unforgiving engineering constraints: photon loss. The companies will investigate advanced lithography processes for Xanadu’s photonic quantum hardware, focusing on whether tighter patterning control can suppress loss mechanisms… Read More
Sir Arthur C. Clarke Deserves a Nobel Prize
By Richard Curtin
Ever since the Silicon Catalyst 2023 Semiconductor Industry Forum (“Welcome to our AI Wonderland”) I’ve been convinced that the Nobel Prize committee needs to consider awarding a posthumous award to Sir Arthur.
To remind you, Sir Arthur’s “2001: A Space Odyssey” movie was released in 1968. At that point in time… Read More
Moving Beyond AI-Assisted Design – Agentrys Shows the Way with Agentic Loop Engineering
At Hot Chips 2026, OpenAI presented Jalapeño, an inference ASIC built with AI in the design loop. As reported from the session by ServeTheHome and Tom’s Hardware, OpenAI showed measured block-level wins over a human baseline — 56% on a BF16 multiply, alongside a 10% smaller matrix-unit area — within a roughly nine-month path from… Read More
Rethinking Phase Jitter: An Algorithmic Approach to Signal Integrity
Byline: Richard Shreiner
Modern semiconductor architectures are pushing the absolute limits of physical scaling. As data rates climb into sub-picosecond regimes across high-performance computing, 5G/6G infrastructure, and advanced AI clusters, physical layer (Layer 1) signal integrity has shifted from an engineering… Read More
Siemens and NVIDIA Accelerate Lithography for Next-Generation AI Chips
Siemens has announced advances in its collaboration with NVIDIA to accelerate computational lithography, addressing a demanding step in manufacturing advanced AI semiconductors. By integrating NVIDIA’s cuLitho library with Siemens Calibre manufacturing software, the companies aim to make sophisticated photomask optimization… Read More
CEO Interview with Francisco Almada Lobo of Critical Manufacturing
Francisco Almada Lobo is CEO and co-founder of Critical Manufacturing. He began his career at a CIM research institute and joined Siemens Semiconductors in 1997. In 2004 he led the migration of an MES in a running high-volume facility, and from 2005 to 2009 he managed the Porto Development Center for Infineon and Qimonda, responsible… Read More
Maskless EUV Lithography: An Alternative to E-Beam
Semiconductor manufacturing depends on lithography: the process of transferring tiny circuit patterns onto a silicon wafer. Conventional extreme-ultraviolet (EUV) lithography projects light with a wavelength of 13.5 nanometers through a reflective optical system, using a custom photomask to define each layer. It can … Read More


Smoothing the Quantum Path: ASML and Xanadu Target Photon Loss