AI isn’t having an easy ride. The media and Wall Street swing wildly between extremes on any hint of a shift in AI sentiment. Dickens saw this coming: “It was the best of times, it was the worst of times, it was the age of wisdom, it was the age of foolishness, it was the epoch of belief, it was the epoch of incredulity, it was the season of … Read More
Functional Safety Analysis of Electronic SystemsSafety engineers, hardware designers and reliability specialists in…Read More
RVA23 Ends Speculation’s Monopoly in RISC-V CPUsRVA23 marks a turning point in how mainstream…Read More
Perforce and Siemens Collaborate on 3DIC Design at the Chiplet SummitThe recent Chiplet Summit at the Santa Clara…Read More
Building the Interconnect Foundation: Bump and TSV Planning for Multi-Die SystemsThe first article in this series examined how…Read More
CHERI: Hardware-Enforced Capability Architecture for Systematic Memory SafetyThe rapid escalation of cyberattacks over the past…Read MoreWhy Your LLM-Generated Testbench Compiles But Doesn’t Verify: The Verification Gap Problem
By Vikash Kumar, Senior Verification Architect | Arm | IEEE Senior Member.
The Problem Every Verification Engineer Recognizes
You ask an LLM to generate a UVM testbench. It produces 25 files. Everything compiles. You run the simulation — and nothing happens. The scoreboard reports zero checks. The slave driver stops after 10… Read More
Efficient Bump and TSV Planning for Multi-Die Chip Designs
The semiconductor industry has experienced rapid advancements in recent years, particularly with the increasing demand for high-performance computing, artificial intelligence, and advanced automotive systems. Traditional single-die chip designs are often unable to meet modern PPA requirements. As a result, engineers… Read More
The Evolution of RISC-V and the Role of Andes Technology in Building a Global Ecosystem
During my frequent trips to Taiwan as a foundry relationship professional I remember meeting Frankwell Lin, CEO of Andes, in Taiwan 15+ years ago. As I walked to TSMC HQ from the Hotel Royal (my second home for many years) Andes was about mid point and Frankwell’s door was always open. Sometimes just tea, sometimes technology,… Read More
Operationalizing Secure Semiconductor Collaboration: Safely, Globally, and at Scale
Semiconductor manufacturing is among the most complex industrial activities in existence. As device geometries shrink and systems become more interconnected, software has become as critical as process technology itself. Modern fabs depend on extensive automation, real-time analytics, and deep integration between tools,… Read More
Keynote: On-Package Chiplet Innovations with UCIe
In the rapidly evolving landscape of semiconductor technology, the Universal Chiplet Interconnect Express (UCIe) emerges as a groundbreaking open standard designed to revolutionize on-package chiplet integrations. Presented by Dr. Debendra Das Sharma, Chair of the UCIe Consortium and Intel Senior Fellow, at the Chiplet… Read More
CEO Interview with Jerome Paye of TAU Systems
Jerome Paye has served as CEO of TAU Systems since late 2025, having joined the company shortly after its founding in 2022 as Chief Operating Officer. In that time, he has helped build TAU Systems into a high-performing team now focused on delivering the ultimate light source for semiconductor lithography.
Paye brings more than… Read More
Things From Intel 10K That Make You Go …. Hmmmm
☑ ANNUAL REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE SECURITIES EXCHANGE ACT OF 1934
For the fiscal year ended December 27, 2025.
1) Intel is constrained on manufacturing. Not by TSMC. But by IFS and mainly by Intel 7, a node from 2021. Normally constraints are good, it means you are running efficiently with lots of … Read More
Podcast EP334: The Unique Benefits of LightSolver’s Laser Processing Unit Technology with Dr. Chene Tradonsky
Daniel is joined by Dr. Chene Tradonsky, a physicist and the CTO and co-founder of LightSolver, where he leads the development of a proprietary physics-based computing system built on coupled laser dynamics to accelerate compute-heavy simulations and other computationally demanding workloads. Before moving into physics,… Read More
Global 2nm Supply Crunch: TSMC Leads as Intel 18A, Samsung, and Rapidus Race to Compete
The semiconductor industry is in the midst of a structural supply challenge that’s tightly coupled to exploding demand for advanced chips, especially those used in AI, HPC, and next-generation mobile and consumer devices. At the center of this vortex is the 2nm class of manufacturing technology, representing one of the most … Read More


CEO Interview with Jerome Paye of TAU Systems