Back in the late 1990s, Sente launched a product called WattWatcher to estimate power from design RTL and simulation activity. This was revolutionary for its time since alternatives, while very accurate, only offered power analysis at the gate level. Gate-level analysis is great for fine-tuning power but is unhelpful for achieving… Read More
Optimizing Photonic Integrated Circuit Production with yieldHUB AnalyticsAs Photonic Integrated Circuits (PIC) continue to gain…Read More
Disaggregating AI Compute to Break the Tokens BarrierAmong several topics dominating news streams these days,…Read More
Customized Foundation IP Enables the Next Generation of Automotive ComputeAs vehicles become increasingly software-defined, automotive semiconductor suppliers…Read More
Rambus Delivers Complete DDR5 Client Chipset for High-Speed CUDIMM and CSODIMM Memory ModulesThe rapid emergence of AI-enabled personal computers is…Read More
From Evidence to Authority: Bounded Gate Authority for Governed Semiconductor RealizationAdvanced semiconductor systems are no longer limited by…Read MoreIntel Foundry Expands the 18A Platform with 18A-P and Demonstrates Long-Term Technology Leadership at VLSI 2026
At the 2026 VLSI Symposium, Intel Foundry provided a detailed update on its process technology roadmap, highlighting the continued maturation of Intel 18A, the introduction of Intel 18A-P, and several advanced research initiatives that extend beyond current gate-all-around (GAA) transistor architectures. The presentation… Read More
GPU-native mask rule checking eliminates the curvilinear mask rule check bottleneck
As semiconductor manufacturing pushes toward advanced nodes with tighter feature sizes, the optical proximity correction (OPC) workflow is adopting curvilinear masks to achieve the larger process windows that traditional Manhattan geometries cannot deliver.
Traditional Manhattan masks constrain shapes to vertical … Read More
A tower-like heterogeneous packaging architecture for the AI era
For years, advanced packaging has been described mostly in planar terms: chiplets placed side by side, connected through interposers, bridges, redistribution layers, substrates, and short-reach electrical links. This view remains important. It supports today’s GPU, HBM, chiplet, and 2.5D integration architectures.… Read More
Akeana Collaborates with Samsung Electronics, Fast-Tracking RISC-V Customers and Ecosystem for Server and Agentic AI Silicon
The momentum behind RISC-V continues to accelerate as Akeana announced a strategic collaboration with Samsung Electronics aimed at reducing time-to-market for next-generation server and agentic AI silicon. The partnership combines Akeana’s high-performance RISC-V compute platform with Samsung Foundry’s advanced process… Read More
Chips&Media’s Next-Generation Video CODEC IP Powers Ambarella’s Expanding Edge AI Portfolio
Chips&Media has announced a strategic licensing agreement with Ambarella for its latest-generation video CODEC intellectual property (IP), marking a significant milestone in the evolution of edge AI, computer vision, and physical AI systems. The agreement follows an extensive technical evaluation process and further… Read More
Agentic AI and the Future of Chip Design: From Productivity Tool to Engineering Partner
Highlights from a recent panel session moderated by Ed Sperling (Semiconductor Engineering) featuring Walden Rhines (Silvaco), Vincent Wong (Verific), Dave Kelf (Breker Verification Systems), Shelly Henry (MooresLab AI), Ann Wu (Silimate), and Cindy Cui (ChipAgents). The panel session was hosted by Electronic System … Read More
CEO Interview with Suresh Vasudevan of Clockwork.io
Suresh Vasudevan is CEO of Clockwork.io, pioneering Software-Driven AI Fabrics™ that recover the 60-80% of cluster capacity that today goes completely unutilized. Previously, he led Nimble Storage to IPO and HPE acquisition, and served as CEO of Sysdig. Prior to that, he was at NetApp and McKinsey & Co.
His focus: making … Read More
Q&A Interview with Mo Steinman, Lightelligence’s Senior Vice President and General Manager, U.S.
Maurice (Mo) Steinman is Senior Vice President and General Manager, U.S. at Lightelligence. He took a few minutes out of a busy week to answer questions about Lightelligence, its optical solutions, application areas for its optical computing products and how it differentiates itself in this market.
Tell us about Lightelligence.
… Read MoreCEO Interview with Mike Horton CEO of HYFIX
Mike Horton is a co-founder of HYFIX Spatial Intelligence, which builds GNSS hardware for decentralized positioning and timing networks, and GEODNET, the world’s largest decentralized GNSS reference network, and HYFIX Spatial Intelligence, which builds GNSS hardware for decentralized positioning and timing networks.… Read More


Intel: Pushing EMIB Forward: Design Methodology Insights with Synopsys Tools