TSMC’s photonics strategy is centered on integrating optical input-output with advanced logic, rather than selling conventional optical transceivers as standalone products. The company is developing a silicon-photonics foundry platform and a packaging architecture called TSMC-COUPE, or Compact Universal Photonic … Read More
Focusing on the AI Big Picture with Moores Lab AI at DAC 2026DAC 2026 proved that agentic AI design flows…Read More
CEO Interview with Jerry Chen of Upbeat TechnologyJerry Chen, CEO and Founder of Upbeat Technology,…Read MoreIntel Eyes a Memory Comeback as AI Rewrites Chip Economics
Intel is considering a return to memory technology decades after abandoning mainstream DRAM and, more recently, selling its NAND business. Chief executive Lip-Bu Tan has argued that memory should no longer be viewed simply as a low-margin commodity. Artificial intelligence is turning bandwidth, latency and data movement … Read More
Agentrys Shows You How to Build a Multi-Agent System in 30 Minutes
Agentrys believes that a purpose-built multi-agent system for chip design shouldn’t be a quarter-long project. Agentic AI systems are becoming quite popular to cut design time and increase quality for complex chip design projects. The challenge is finding the right agentic flow for a particular application. There are… Read More
Questa One Updated at DAC 2026
Abhi Kolpekwar, VP & General Manager, Digital Verification Technologies at Siemens EDA met with me at #DAC2026 to provide the big picture on smart verification tools, something they call Questa One. Their verification tools are infused with AI to improve productivity on projects like SoCs, 3D IC and chiplets. Abhi shared… Read More
The Fab Is Not the Finish Line
AI may close the design. The fab may finish the silicon. Production still has to realize the system.
Semiconductor engineering is becoming extraordinarily capable.
EDA platforms are expanding from individual design tasks toward increasingly complete system analysis.
Multiphysics simulation is connecting electrical, … Read More
Hot Chips 2026: Architectures for the Agentic Computing Era
Hot Chips 2026, formally the thirty-eighth Symposium on High Performance Chips, arrives at Stanford’s Memorial Auditorium from August 23 through 25 with a program that captures a decisive shift in computer architecture. Peak arithmetic throughput remains important, but the conference is increasingly about system balance:… Read More
Latest Savage on Security Webinar Focuses on Gen-AI for Chip Design and Security
Key Takeaways from the webinar:
Multi-agent intelligent assistant systems of the future will be architected to automate and augment SoC design and security verification and redefining semiconductor innovation, reshaping design, verification and security for the next generation of trusted silicon.
The ESD Alliance is delighted… Read More
Meet Quadric on the Road: Three Must-Attend AI Events
This late summer, Quadric is taking its vision for programmable, on-device AI to three of the industry’s most influential gatherings. From advanced processor design at HotChips to scalable deployment at the AI Infra Summit and physical AI at Embedded World North America, each stop offers a different opportunity to see how the… Read More
PDF Solutions’ Exensio Was Built for Semiconductor Analytics. The New Exensio Aurora Architecture Is Built for Semiconductor Intelligence.
The semiconductor industry doesn’t have a shortage of data. It has a shortage of ways to turn that data into useful manufacturing insights quickly enough to matter.
That is the problem PDF Solutions’ Exensio solution has addressed for years. Built specifically for semiconductor manufacturing, Exensio brings … Read More
Beyond Moore: Co-Optimizing AI from Systems to Materials
At the OCP APAC Summit in Taiwan, August 11–12, 2026, Applied Materials’ Subi Kengeri framed artificial intelligence as the semiconductor industry’s largest inflection point. AI demand is accelerating the industry toward one trillion dollars in annual revenue, but the keynote’s central message was more consequential than… Read More




Verification IP proves essential for PCIe GEN5