| Category | TSMC N2 | Intel 18A | Samsung 2nm (SF2) |
|---|---|---|---|
| Target Mass Production | 2H 2025 (risk production late 2024) | H2 2024 (internal); early 2025 for IFS customers | Late 2025 – risk production |
| Transistor Type | GAA nanosheet (TSMC’s implementation) | RibbonFET (Intel’s GAA design) | MBCFET™ (Multi-Bridge Channel FET) |
| Backside Power |
Also Known As: TSMC 2nm node
Developer: Taiwan Semiconductor Manufacturing Company (TSMC)
Node Class: Advanced logic semiconductor node
Technology Generation: 2 nanometer (2nm)
Status (as of 2025): Risk production in progress; volume production expected in late 2025 or 2026
The TSMC N2 process node marks a major … Read More
Full Name: Patrick Paul Gelsinger
Born: March 5, 1961
Nationality: American
Occupation: Technology Executive, Engineer, Innovator
Known For: Former CEO of Intel Corporation, Technology Leadership in Semiconductor Industry
Pat Gelsinger grew up in Pennsylvania and displayed a passion for electronics… Read More
Born: 1959, Malaysia
Nationality: American
Occupation: Entrepreneur, Engineer, Venture Capitalist, Executive
Current Positions:
CEO and Chairman of Intel Corporation (since March 2025)
Founder and Chairman of Walden International (venture capital firm)
Notable Former Roles:
CEO and Executive Chairman of Cadence Design
As Moore’s Law slows down, it has become increasingly difficult and expensive to scale monolithic SoCs. This has driven the semiconductor industry toward heterogeneous integration, which combines different functional blocks (CPU, GPU, memory, accelerators, etc.) in a single package… Read More
A 3D Integrated Circuit (3D IC) is a device in which two or more active electronic layers (dies or wafers) are vertically stacked and interconnected to function as a single integrated system. These layers are interconnected using fine-pitch vertical interconnects, such as Through-Silicon Vias (TSVs) or hybrid bonds, allowing… Read More
Extreme Ultraviolet Lithography (EUV or EUVL) is an advanced semiconductor manufacturing technology used to print the smallest features on integrated circuits (ICs), particularly at leading-edge nodes such as 7nm, 5nm, 3nm, and below. EUV uses light with a wavelength of 13.5 nanometers, which is in the extreme ultraviolet… Read More
Chiplets are small, functional integrated circuit (IC) blocks that are designed to work together in a modular fashion to form a complete system-on-chip (SoC) or system-in-package (SiP). Instead of building a large, monolithic chip on a single die, chiplet-based design breaks the system into multiple smaller dies that are connected… Read More
CppSim – system-level simulator by creating C++ code of your schematic
PandA-bambu – framework for research in high-level synthesis and HW/SW co-design
QElectroTech – Electronic diagrams
SystemC – system design and modeling
SVALint – Linter for SystemVerilog Assertions (SVA)
Switchboard… Read More
The Semiconductor IP (Intellectual Property) lifecycle refers to the process by which design IP blocks—such as processors, memory controllers, interface PHYs, and verification models—are developed, verified, licensed, reused, and ultimately retired within the context of integrated circuit (IC) and SoC (System-on-Chip)
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cHBM for AI: Capabilities, Challenges, and Opportunities