Also known as: TSMC 1.4nm, A14 process node
Node class: Advanced logic technology (1.4nm)
Foundry: Taiwan Semiconductor Manufacturing Company (TSMC)
Expected HVM (High Volume Manufacturing): 2028
Predecessor: TSMC N2 (2nm)
Transistor architecture: 2nd Generation GAAFET (nanosheet)
Backside power variant: A14P (planned… Read More
Full Name: Tan Hock Eng
Born: 1951 or 1952 (exact date undisclosed)
Nationality: Malaysian-American
Current Role: President and Chief Executive Officer (CEO), Broadcom Inc.
Other Roles: Board Member of Broadcom Inc., Former President & CEO of Integrated Device Technology (IDT)
Education:
B.S. in Mechanical Engineering
Also Known As: Semiconductor Industry Supply Chain, Chip Manufacturing Ecosystem
Domain: Electronics, High-Tech Manufacturing, Global Trade
Purpose: To describe the end-to-end ecosystem that enables the design, fabrication, packaging, and delivery of semiconductor chips.
Major Players: EDA vendors, IP providers, … Read More
Full Name: Gate-All-Around Field-Effect Transistor
Also Known As: Gate-All-Around FET, Nanosheet FET, Nanowire FET
Category: Advanced 3D CMOS Transistor
Predecessor: FinFET (Tri-Gate Transistor)
Successors/Subtypes: Nanosheet FET, MBCFET (Samsung), RibbonFET (Intel), Forksheet FET
First Commercial Use: Samsung… Read More
Full Name: Fin Field-Effect Transistor
Also Known As: 3D Tri-Gate Transistor, Multi-Gate FET
Category: Advanced CMOS Transistor Technology
Introduced by Industry: ~2011 (Intel 22nm)
Invented by: Chenming Hu and colleagues at UC Berkeley (1999)
Replaced: Planar CMOS Transistors
Successor Technology: Gate-All-Around … Read More
Full Name: Walden C. Rhines
Date of Birth: November 1946
Nationality: American
Fields: Semiconductors, Electronic Design Automation (EDA), Materials Science, Leadership
Notable Titles:
President & CEO, Cornami, Inc.
Former Chairman & CEO, Mentor Graphics
Former EVP, Texas Instruments
Chairman Emeritus, Electronic
Node Name: Samsung 2nm
Internal Name: SF2 (Samsung Foundry 2nm)
Technology Type: Gate-All-Around (GAA) – MBCFET™
Developer: Samsung Electronics (Samsung Foundry Division)
Announced: May 2022
Targeted Risk Production: 2025
Targeted High Volume Manufacturing (HVM): 2026
Successor to: Samsung 3GAP (3nm Gate-All-Around… Read More
Official Names:
Samsung 3GAE (3nm Gate-All-Around Early)
Samsung 3GAP (3nm Gate-All-Around Plus)
Technology Type: Gate-All-Around (GAA) FET – MBCFET™
Developer: Samsung Electronics (Samsung Foundry)
Announced: 2021 (3GAE), 2022 (3GAP)
Mass Production Start:
3GAE: June 2022
3GAP: Expected 2024–2025
Predecessor: 4nm
Full Name: High Numerical Aperture Extreme Ultraviolet Lithography
Abbreviation: High-NA EUV
Technology Type: Advanced semiconductor photolithography
Developed By: ASML, Zeiss, in collaboration with Intel, TSMC, imec, and others
First Deployment Target: Intel (expected ~2025–2026)
Main Use: Sub-2nm logic node patterning… Read More
Name: SystemVerilog
Type: Hardware Description and Verification Language (HDVL)
Developed by: Originally by Accellera; standardized by IEEE
IEEE Standard: IEEE 1800™
First Released: 2002 (merged into IEEE 1800-2005)
Latest Version: IEEE 1800-2017 (as of 2025)
Predecessor: Verilog
Successor/Alternative: SystemC (C++… Read More
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cHBM for AI: Capabilities, Challenges, and Opportunities