What a great interview! Xilinx CEO Moshe Gavrielov is right on the money HERE where he credits the high 28nm yields to the “very intimate” linkage in process development with TSMC.
Continue reading “TSMC 28nm is Fabulous! TSM Stock is not so Fabulous!”
The speed with which The Mobile Tsunami engulfs the old PC Market is just incredible. 18 months ago the tablet and smartphone markets were considered a Green Field of Opportunity for PC OEMs and chip suppliers to graze in for the next decade. The fences, however, are closing in fast as Apple continues to drive its iOS empire into new geographies and market segments. Even I thought a few months back that corporations would hedge on some of their tablet purchases by staying with the Wintel x86 legacy (I was never a believer in Windows on ARM). Now I am switching my view to the conclusion that Apple and VMWare will partner to take out Microsoft in the corporate world with their full range of iOS based iPADs through x86 and MAC OS based MacBook Air and MacBook Pro notebooks.
Founded in 1998, VMWare was one of the few startup companies to come out of the 2000 technology bubble downturn and thrive with a software product that enabled much greater server efficiency. The software products they create can easily be summed up as the efficient hardware resource allocator for a multitude of application sessions running various flavors of Linux, Microsoft and MAC O/S and their applications. For the last few years they have helped us old Wintel guys switch to the MAC while running some one off Windows programs.
During the first six years of its existence it was constantly under the threat of Microsoft destroying them by coming up with their own virtualization software. So in 2004 they sold out for $625M to EMC to alleviate the near term threat from Redmond. EMC subsequently took them public in 2007 and today they are worth $40B vs. Microsoft’s $246B. For the past few years while Facebook has gotten all the attention, VMWare has seen its stock price increase by more than three times. They are an Oasis for software engineers and are hiring like mad, including in the area of iOS development. What does this mean?
A couple weeks ago I sat through multiple Wall St. analyst pitches of which one was focused on the coming corporate transition from Windows XP (remember that one – yea the one introduced when your Father was still driving an Oldsmobile) to Windows 7. The analyst described with a pained look on his face how corporate IT hates to go through the typical transition that requires them to check out every PC and see if the new OS will operate without breaking or whether to ditch it for a new machine. It’s expensive and time consuming to say the least.
Apple knows that corporations are facing two trends today that work in its favor. The first is the BYOD (Bring Your Own Device) to work (usually an iPhone and MacBook PC) and the second is the strong interest in the iPAD. Apple needs just one more trick to get the CIO to buy in to the Apple ecosystem and that is support for the Windows Legacy. This is where VMWare comes in to save the day. Their current software will allow an Apple MAC to run Windows sessions. I am speculating that when it comes to iPADs, VMware is going to offer a piece of code that sits on top of the ARM processor to allow Windows sessions that are delivered from the iCloud to the device. Remember that the iPAD has very little in the way of DRAM so the cloud is the way to go and this is Apple’s way of getting corporations to move their enterprise to its iCloud. Nice lock in strategy.
Microsoft has apparently woken up and is rumored to be announcing an iOS version of Office in November (Android versions are probably on the backburner as Microsoft is trying to use x86 tablets and smartphones to win corporate and keep Google out). This may sound confusing because on the one hand, Microsoft’s primary revenue comes from Windows based PCs running Office. On the other hand they see Apple assaulting corporate America and they must save Office, their biggest revenue generator, even if it means losing a Windows 7 or Windows 8 license. It’s the lesser of two bad choices.
The ramifications of this Apple and VMWare partnership will reverberate across the semiconductor industry. First and foremost, the Microsoft’s large $246B market cap is now to be carved amongst Apple, VMWare and Intel. Intel will continue to own Apple’s Mac business and soon will fab Apple’s ARM processor. ARMH continues to win through Apple but loses license and royalty revenue from the rest of the mobile ARM Camp that was looking to take a piece of the Green Fields. With a solid corporate strategy, it will be difficult for HP and Dell to stop the Apple Mobile Tsunami. The tide has definitely turned from the time just 18 months ago when it looked like the Fabless ARM Camp in partnership with Microsoft and Google was going to thrash Intel in PCs.
Full Disclosure: I am Long AAPL, INTC, QCOM, ALTR
The way that the press that covers EDA has changed in the last few years is quite dramatic. Semiwiki is, of course, part of that change. The official press is less and less relevant and bloggers and newsletters are more and more important.
Continue reading “Press at DAC”
Attendance at DAC is up across the board. Not surprisingly, with San Francisco being so close to silicon valley, the biggest increase was in people coming to see the exhibits.
Continue reading “DAC Attendance up”
Before this DAC I had never even heard of ICScape, so on Monday and Wednesday I visited their booth to find out their story.
Steve Yang, Ph.D. (Co-founder and President), Ravi Ravikumar (Marketing)
ICScape was founded in 2005 in Santa Clara by Steve Yang (Circuit Design engineer for microprocessor, Synopsys) and Jason Xing (Sun Research Labs for EDA, Ph.D in Magnetics and Computer Science). Continue reading “Schematic, IC Layout, Clock and Timing Closure from ICScape”
Britto Vincent of ProPlus Design Solutions met with me at DAC on Monday morning to talk about Design For Yield (DFY) and Analog Fast SPICE.
In 2011 ProPlus announced DFY tools where the technology came from IBM, it provides fast Monte Carlo results up to 3 sigma, then added NanoSpice for faster simulation results. Similar in approach to Solido but with our own SPICE tool. High sigma analysis is useful in memory designs. Statistical simulation with yield analysis is accomplished using NanoYield. We had a joint presentation with IBM on Tuesday at DAC, IBM did a paper on Sunday too.
History of where ProPlus cam from – Started out as BTA, then Celestry, Cadence acquired Ultrasim, 2006 spun out from Cadence. We’ve been doing device modeling since 1991 (BTA).
In the Lab we can perform noise analysis.
Our own SPICE tool is called NanoSpice (like FineSim Pro). The simulator is both hierarchical and parallel. You can simulate a DRAM with up to 550M elements, or an SRAM with up to 65M elements.
The customers of NanoSpice cannot be mentioned yet, although we have a memory IDM and a southern CA client.
Device Modeling is done with the BSIMProPlus tool, and it is used by foundries and IDMs to create new models. This has been our core business.
NanoSpice is our Analog Fast SPICE circuit simulator and it can accept Spectre, HSPICE and Eldo format. The output is with FSDB so you can use a standard wave form viewer from companies like SpringSoft (Novas). Foundry qualification is in process now for NanoSpice.
For high sigma analysis our approach has been qualified with IBM (implied qualification with Common Platform).
We have offices in Japan, Shanghai, San Jose, Beijing and Taiwan.
NanoSpice is about 5X to 10X faster than HSPICE, Spectre, FineSim SPICE. Not a FastSPICE simulator and it’s similar to the BDA simulator. We are faster than Cadence APS. Co-simulation not supported yet, just pure SPICE netlist. We do support Verilog A.
We have about 100 people now and are privately funded.
12 months from now we expect more customer adoption in DFY and SPICE simulation.
I speak VHDL and SystemC, others speak Verilog and SystemVerilog … what do you speak?
Before getting into the core of the topic let me give you some round figures, engineers love numbers. Julian Lonsdale “European Sales Manager at Aldec” informed me at the Xfest Munich last month that Aldec carried out a survey to evaluate the usage of VHDL and Verilog among engineers in the States and Europe and the summary of the results is as follow:
Continue reading “How many languages an Engineer should speak?”
Okay, President Obama didn’t actually stop at DAC but he did do a drive by. I happened to be stepping out for some much needed fresh air and there goes his speeding motorcade. It was quite a sight actually, with all of the motorcycles, SUVs, a SWAT vehicle and even a paramedic rig (my son the Fireman drives one of those). The president was in town for dinner with donors at $5,000 per plate. And here I am in the DAC press room eating free food in plastic containers. The exciting life of an internationally recognized industry blogger.
This year DAC was extra special as my beautiful wife joined me for the fun and frolic including VIP tickets to the Denali party. Chatting with Wally Rhines is always fun in addition to the Who’s Who of the semiconductor ecosystem. A great time was had by all, believe it. Lots of interesting stuff is going on which I will blog about later.
Looking at the SemiWiki analytics 30 days prior to DAC I knew there would be a great turnout. The SemiWiki pre DAC blogs did very well with 36,150 people reading them, compared to last year’s 14,375 people. My guess was that attendance this year would be +20% over the last San Francisco DAC. (UPDATE: Conference attendees were up to 1901, up 9% on last year. But exhibits only passes were way up to 2783, an increase of 39%. Even booth staff was up 11% to 2704.). If attendance is up SemiWiki will take full credit due to the excellent coverage we provided. If not then never mind. The SemiWiki bloggers will post 20+ post DAC 2012 blogs in the coming days so stay tuned!
Next year DAC 2013 is in Austin Texas. My lovely wife and I will definitely attend as we have never been to Austin! My brother who works for Applied Materials lives there so we have a sub agenda as well. As you will see by the numbers below there is quite a market for EDA and IP in Texas. My prediction is that the SemiWiki DAC 2013 blog numbers are significantly higher next year.
Austin Activities:
Warehouse and Sixth Street Entertainment Districts– Four blocks of Fourth and Fifth Streets comprise the Warehouse District. The buildings have been renovated from warehouses to trendy, distinctive hot spots. Austin’s Sixth Street is widely known for its unique blend of dance clubs, live music venues, restaurants and bars.
SoCo– One of the hippest Austin hangouts is SoCo, a colorful stretch of Congress Avenue lined with funky shops, trendy dining spots, unique accommodations, art galleries and music venues. On the first Thursday of each month, (June 6, 2013) merchants keep their doors open until 10 p.m., playing host to an array of events and activities.
South of the Congress Avenue Bridge
Music Scene
Ever wonder why Austin is known as the Live Music Capital of the World®? The slogan became official in 1991, after it was discovered that Austin had more live music venues per capita than anywhere else in the nation. Today, Austin, TX hosts nearly 200 venues and is home to thousands of musicians. Which means you can catch a show any day of the week, at almost any time.
Major Employers of Design Engineers in Austin
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DAC has drawn attendees from the following companies located
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I moderated a panel on partitioning today and I have to say that I learned some things. The panelists were Jonathan DeMent from IBM, Santosh Santosh from NVIDIA and Hao Nham of eSilicon. Considering the different types of designs being done their approach to partitioning and the reasons for doing so were very similar.
When you first think of partitioning a design, you think of the technical reasons for doing so. Tools today have a sweet spot of around 500K instances. Larger than that and the run times get prohibitively long and so the iteration from an update to RTL to completed physical design becomes too long. Plus designs naturally partition in a certain way depending on the bus structure, the floorplan and other aspects of the SoC itself.
What I hadn’t thought of was that the human aspects of the design team are just as important. The most obvious is geographical location. If you have a design team in, say, Bangalore then you want to give them ownership of some comprehensible part of the design. And for the technical reasons you can’t just take a large block and chop it in two since the constraints etc that are needed to put it all back together later don’t exist and aren’t well understood and the communication needed to close the design would be completely excessive.
Another major factor in partitioning is how stable that part of the design is. If you are putting a standard piece of IP onto the chip, such as a USB controller, then it isn’t going to change much and you can put it in a partition with other stable blocks and get that part of the design completed early. On the other hand, if you have part of a design that is in flux, you want to put it in its own partition so you are not constantly having to redo a large unchanging portion because it was mistakenly grouped with something volatile. Unstable partitions need more added uncommitted gates whereas stable parts can be squeezed down more.
The challenge to getting this right is that what is optimum for the chip area (do as flat as possible) is not optimal for the tools and the schedule (keep to the sweet spot) and especially may be suboptimal for the human dimension. Everyone seemed to have rules of thumb for doing this and EDA tools (such as floorplanning) only address the technical dimension.
Wednesday morning I attended a panel discussion with: ARM, IBM, Cadence, GLOBALFOUNDRIES and Samsung.
The panelists all sang the same song of collaboration between EDA, IP and Foundry to enable 28nm, 20nm and even 14nm.
Continue reading “Collaboration at 28nm, 20nm and 14nm”
