Chiplets appeared on SemiWiki in 2020 and have been a top trending keyword ever since. The question is not IF chiplets will disrupt the semiconductor industry, the question is WHEN? I certainly have voiced my opinion on this (pro chiplet) but let’s hear it from the experts. There was a live panel recently sponsored by Silicon Catalyst… Read More
Tag: tsmc
Resolution vs. Die Size Tradeoff Due to EUV Pupil Rotation
The many idiosyncrasies of EUV lithography affect the resolution that can actually be realized. One which still does not get as much attention as it should is the cross-slit pupil rotation [1-3]. This is a fundamental consequence of using rotational symmetry in ring-field optical systems to control aberrations in reflective… Read More
IEDM 2023 – 2D Materials – Intel and TSMC
Intel and TSMC make up two of the three leading edge logic companies. At IEDM held in December 2022, Intel presented a paper on 2D Materials and TSMC presented 6 papers. Clearly 2D materials are of great interest at least to two of the three leading edge logic companies. Before diving into the papers, some background context is needed.… Read More
3DIC Physical Verification, Siemens EDA and TSMC
At SemiWiki we’ve written four times now about how TSMC is standardizing on a 3DIC physical flow with their approach called 3Dblox, so I watched a presentation from John Ferguson of Siemens EDA to see how their tool flow supports this with the Calibre tools. With a chiplet-based packaging flow there are new physical verification… Read More
Hynix historic loss confirms memory meltdown-getting worse – AMD a bright spot
-Hynix reports worst downturn in 10yrs – Already in red ink
-If the #2 memory maker is already negative what does it say?
-Confirms our view of 2023 write off- maybe 2024 better?
-Micron Mangled? & Toshiba Toast?- Buyers advantage
Hynix posts record $1.4B loss- worst in 10 years
Not all that surprisingly Hynix reported… Read More
CEO Interview: Stephen Fairbanks of Certus Semiconductor
Trained as a semiconductor Analog and RF Circuit Designer, Stephen Fairbanks has been designing and developing process-specific I/O and ESD libraries for 24 years. His foundational training began while attending Brigham Young University designing highspeed 32 GSPS data acquisition systems and RF interfaces for a time-of-flight… Read More
Who will Win in the Chiplet War?
The first Chiplet specific conference is coming up which is a milestone in itself. As we know the only thing new about chiplets is the name but when there is a dedicated conference to such a specific thing you know it has officially “arrived”. There is even a cool new tagline: Chiplets make huge chips happen!
“The First Annual Chiplet… Read More
IEDM 2022 – TSMC 3nm
TSMC presented two papers on 3nm at the 2022 IEDM; “Critical Process features Enabling Aggressive Contacted Gate Pitch Scaling for 3nm CMOS Technology and Beyond” and “A 3nm CMOS FinFlexTM Platform Technology with Enhanced Power Efficiency and Performance for Mobile SOC and High Performance Computing Applications”.
When … Read More
High-End Interconnect IP Forecast 2022 to 2026
The Interface IP market has grown with 21% CAGR from 2017 to 2021 and we review the part of this market restricted to the high-end of PCIe, DDR, Ethernet and D2D IP made of PHY and controller targeting the most advanced technology nodes and latest protocol release. We will show that an IP vendor focusing investment on the high-end interconnect… Read More
Samsung Versus TSMC Update 2022
After attending the TSMC and Samsung foundry conferences I wanted to share some quick opinions about the foundry business. Nothing earth shattering but interesting just the same. Both conferences were well attended. If we are not back to the pre pandemic numbers we are very close to it.
TSMC and Samsung both acknowledged that there… Read More