The demand for higher performance, greater configurability, and more cost-effective solutions is pushing the industry toward heterogeneous integration and 3D integrated circuits (3D ICs). These solutions are no longer reserved for niche applications—they are rapidly becoming essential to mainstream semiconductor design.… Read More
Tag: STCO
Webinar: Intel Presents: Modern EDA Solutions for Scalable Heterogeneous Systems
Featured Speakers:
- Vivek Rajan, Sr. Principal Engineer, Intel
- Amlendu Choubey, Sr. Director, Product Management, Synopsys
Why You Should Attend:
Rapidly emerging new workloads and disruptive architectures have highlighted the importance of advanced packaging and 3DIC technologies. The scaling of Moore’s Law has pushed… Read More
Semiconductor Devices: 3 Tricks to Device Innovation
The semiconductor industry’s incredible juggernaut has been powered by device innovations at its very core. Moreover, present-day enterprises encounter immense competitive pressures and innovations are a key differentiator to maintain their competitive edge1.
“It wasn’t that Microsoft was so brilliant or clever… Read More
Emerging Stronger from the Downturn
It was refreshing to hear a talk focused on emerging stronger from the downturn when the news and media are focused on the gloom. At the recent Siemens EDA User2User conference, Joe Sawicki, executive vice president, IC, gave an uplifting keynote talk to the audience. He highlighted a secular growth trend happening in the semiconductor… Read More
Multi-Die Systems Key to Next Wave of Systems Innovations
These days, the term chiplets is referenced everywhere you look, in anything you read and in whatever you hear. Rightly so because the chiplets or die integration wave is taking off. Generally speaking, the tipping point that kicked off the move happened around the 16nm process technology when large monolithic SoCs started facing… Read More
Interconnect Choices for 2.5D and 3D IC Designs
A quick Google search for “2.5D 3D IC” returns 669,000 results, so it’s a popular topic for the semiconductor industry, and there are plenty of decisions to make, like whether to use an organic substrate or silicon interposer for interconnect of heterogenous semiconductor die. Design teams using 2.5D and … Read More
Delivering 3D IC Innovations Faster
3D IC technology development started many years ago well before the slowing down of Moore’s law benefits became a topic of discussion. The technology was originally leveraged for stacking functional blocks with high-bandwidth buses between them. Memory manufacturers and other IDMs were the ones to typically leverage this … Read More
System Technology Co-Optimization (STCO)
My first exposure to seeing multiple die inside of a single package in order to get greater storage was way back in 1978 at Intel, when they combined two 4K bit DRAM die in one package, creating an 8K DRAM chip, called the 2109. Even Apple used two 16K bit DRAM chips from Mostek to form a 32K bit DRAM, included in the Apple III computer, circa… Read More