CEO Interview: Andreas Kuehlmann of Tortuga Logic

CEO Interview: Andreas Kuehlmann of Tortuga Logic
by Bernard Murphy on 10-23-2020 at 6:00 am

CEO interview

You may remember Andreas from his time at Synopsys, where he led the new Software Integrity Business Unit. He joined Tortuga Logic a couple of months ago to lead the company. Given his background in software security, I was eager to get a CEO interview. Andreas is a EE with background at IBM in the PowerPC and EDA. He directed Cadence… Read More


License-first Scheduling for High-throughput Computing

License-first Scheduling for High-throughput Computing
by Admin on 04-21-2020 at 2:00 pm

Saving Serious Money With License-first Scheduling for High-throughput Computing

Live Webinar – Tuesday | April 21st | 2pm ET (11am PDT)

Make Your Infrastructure Work Harder with License-first Scheduling

Computer hardware and software never get tired and never need a lunch break. Ideally you’d like to use them 24/7 –

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What are you ready to mobilize for FPGA debug?

What are you ready to mobilize for FPGA debug?
by Frederic Leens on 12-04-2017 at 7:00 am

There are 3 common misconceptions about debugging FPGA with the real hardware:

[LIST=1]

  • Debugging happens because the engineers are incompetent.
  • FPGA debugging on hardware ‘wastes’ resources.
  • A single methodology should solve ALL the problems.
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    Embedded Agility

    Embedded Agility
    by Bernard Murphy on 11-21-2016 at 12:00 pm

    A familiar refrain in software development, as much as in hardware development, is that the size and complexity of projects continues to grow as schedules shrink and expectations of quality can increase dramatically. A common approach to managing this challenge in software programs is agile development practices and one aspect… Read More


    There is more than C to worry about

    There is more than C to worry about
    by Don Dingee on 10-17-2016 at 4:00 pm

    We periodically see that “software ate the world” line – I’m pretty sure I’ve used it a couple times myself. The fact is, software doesn’t run itself; never has, never will. Somewhere there has to be an underlying computer. First it was on beads, then in gears, then in tubes.… Read More


    More on HAPS hybrid prototyping for ARMv8 with Linaro

    More on HAPS hybrid prototyping for ARMv8 with Linaro
    by Don Dingee on 08-19-2016 at 4:00 pm

    A few weeks ago we previewed a Synopsys webinar describing how they are linking the ARM Juno Development Platform with the HAPS-80 and HAPS ProtoCompiler environment. I’ve had a look at the archived event and have some additional thoughts.… Read More


    Not-so-ulterior motive leads SoftBank to ARM

    Not-so-ulterior motive leads SoftBank to ARM
    by Don Dingee on 07-19-2016 at 4:00 pm

    This week’s £24.3B offer for ARM Holdings plc from SoftBank has been widely viewed as Brexit reflexit. It did firm up in the preceding two weeks, but this acquisition offer has been years in the making – and if it sticks, one SoftBank motive many analysts and editors are missing comes front and center.… Read More


    Reusable HW/SW Interface for Portable Stimulus

    Reusable HW/SW Interface for Portable Stimulus
    by Pawan Fangaria on 06-03-2016 at 7:00 am

    Although semiconductor community has ushered into the era of SoCs, the verification of SoCs is still broken. There is no single methodology or engine to verify a complete SoC; this results in duplication of efforts and resources for test creation and verification at multiple stages in the SoC development, albeit with different… Read More


    CEO Insight: Transformation of Vayavya Labs into System Design Automation

    CEO Insight: Transformation of Vayavya Labs into System Design Automation
    by Pawan Fangaria on 05-12-2016 at 7:00 am

    With the advent of SoCs, design abstractions and verification has moved up at the system level. It’s imperative that EDA moves up the value chain to start design automation at system level. The System Design Automation will be the new face of EDA in coming years.… Read More