Part 1 of this 4-part series introduces the complexities of developing and bringing up the entire software stack on a System on Chip (SoC) or Multi-die system. It explores various approaches to deployment, highlighting their specific objectives and the unique challenges they address.
As the saying goes, it’s… Read More
Dan is joined by Sivakumar P R, the Founder and CEO of Maven Silicon. He is responsible for the company’s vision, overall strategy, business, and technology. He is also the Founder and CEO of ASIC Design Technologies.
Dan and Sivakumar discuss SoC Verification Flows and Methodologies based on his article published on SemiWiki.… Read More
Dan goes on a scenic tour of verification with Adnan Hamid, founder and CEO of Breker Verification Systems. We discuss the rather unusual way Adnan got into semiconductors and SoC verification. Adnan then breaks down the verification task into its fundamental parts to reveal what the three pillars of verification are and why … Read More
RK has over 25 years of industry experience in the domain of Telecom, Embedded software and Semiconductors. Before co-founding Vayavya, he was a co-founder at Smart Yantra Technologies, where he has held various positions in engineering, marketing and management. At Vayavya RK is responsible for overall management and strategic… Read More
Effective and efficient functional verification is one of the biggest hurdles for today’s large and complex system-on-chip (SoC) designs. The goal is to verify as close as possible to 100% of the design’s specified functionality before committing to the long and expensive tape-out process for application-specific integrated… Read More
On Wednesday, October 9, 2019, I had the pleasure of spending the day at ARM Techcon at the San Jose Convention Center. In the morning, in addition to getting some sneak peeks into the exhibitor area, I attended some of the morning keynote presentations, which focused on artificial intelligence (AI) and machine learning (ML) topics.… Read More
Synopsys runs a “Industry verifies with Synopsys” lunch at each DVCon, which isn’t as cheesy as the title might suggest. The bulk of the lunch covers user presentations on their use of Synopsys tools which I find informative and quite open, sharing problems as much as successes. This year, Eamonn Quiqley, FPGA engineering manager… Read More
Bernard Murphy and I spent time with the SmartDV folks in preparation for the Design Automation Conference later this month. Bernard is an internationally recognized verification expert so his feedback is often sought after by emerging and leading verification companies, absolutely. Verification IP is a crowded market so … Read More
