On Sunday evening December 6[SUP]th[/SUP] before IEDM, IMEC held the IMEC Technology Forum (ITF). In part 1 of this blog I discussed the introduction and the first two presentations given by An Steegen and Mark Rodder. In this blog I will discuss the final two presentations. Part 1 can be accessed here.… Read More
Tag: scotten jones
IEDM Blogs – Part 3 – Global Foundries 22FDX Briefing
While I was at IEDM I had an opportunity to sit down with Subramani (Subi) Kengeri, the Vice President, General Management, CMOS Platforms Business Unit and Jason Gorss from corporate marketing at Global Foundries (GF) for a briefing on GF’s new 22FDX process technology.
Subi told me his background was in design but that he is now… Read More
Why Did Apple Buy a Fab?
It was announced today that Apple has purchased a 200mm fab located in San Jose from Maxim Integrated Products for $18.2 million dollars. My initial reaction to this announcement was shock but then I started thinking through what Apple might use the fab for and I concluded this announcement is less significant and surprising than… Read More
IEDM Blogs – Part 2 – Memory Short Course
Each year the Sunday before IEDM two short courses are offered. This year I attended Memory Technologies for Future Systems held on Sunday, December 6[SUP]th[/SUP]. I have been to several of these short courses over the years and they are a great way to keep up to date on the latest technology.… Read More
IEDM 2015 Blogs – Part 1 – Overview
The International Electron Devices Meeting (IEDM) is one of, if not the premier conference for semiconductor process technology. The 2015 meeting just finished up on Wednesday, December 9th.
This year’s meeting was held from Saturday, December 5[SUP]th[/SUP] through Wednesday, December 9[SUP]th[/SUP] in Washington DC.… Read More
Cost Modeling as a Decision Making Tool
The use of simulation is well established in the semiconductor industry. Virtually all circuit designs are run through a Spice simulation, layouts are analyzed for timing issues and even process development employs process simulation tools. What I believe is less widely used but just as useful is cost modeling.
The semiconductor… Read More
Extending EUV Lithography
I have previously written about SPIE day 1 and 2 so I want to wrap up my coverage with some impressions from days 3 and 4. My single biggest take away from the conference is that EUV has made tremendous progress in the last 12 months. Last year the mood of the conference was in my opinion pessimistic with respect to EUV, this year the mood… Read More
ASMC 2015 Preview
From May 3[SUP]rd[/SUP] to May 6[SUP]th[/SUP] the 26[SUP]th[/SUP] annual Advanced Semiconductor Manufacturing Conference (ASMC) will be held in Saratoga Springs, New York.
The ASMC offers a unique view of challenges to the semiconductor industry focusing on things like defect reduction, metrology and fab operations. In… Read More
Moore’s Law is dead, long live Moore’s Law – part 5
In the first four installments of this series we have examined Moore’s law, described the drivers that have enabled Moore’s law and discussed the specific status and issues around DRAM and logic. In this final installment we will examine NAND Flash.… Read More
Moore’s Law is dead, long live Moore’s Law – part 4
In the third installment of this series we discussed the status of DRAM scaling and Moore’s law. In this installment we will tackle logic. The focus will be on foundry logic.
Logic technology challenges
In the second installment of this series we discussed constant electric field scaling. As we mentioned in that installment at … Read More