Is Low Power a Challenge? ICE-Grain Answers the Challenge

Is Low Power a Challenge? ICE-Grain Answers the Challenge
by Paul McLellan on 05-12-2015 at 7:00 am

Blogs have limited wordcount so insert your own generic opening paragraph here about the importance of low power in IC design. Mention IoT and cloud datacenters for extra credit.

It is well-known that the biggest reductions in power come from changes at the architectural level. Tools and process can do some things and since they… Read More


A Comprehensive Power Optimization Solution

A Comprehensive Power Optimization Solution
by Pawan Fangaria on 04-20-2015 at 7:00 am

In an electronic world driven by smaller devices packed with larger functions, power becomes a critical factor to manage. With power consumption leading to heat dissipation issues, reliability of the device can be affected, if not controlled or the device not cooled. Moreover, for mobile devices such as smartphones or tablets… Read More


Silvaco: TCAD to Signoff in Vertical Markets

Silvaco: TCAD to Signoff in Vertical Markets
by Paul McLellan on 04-18-2015 at 8:00 pm

Recently, I talked about meeting with Dave Dutton the CEO of Silvaco. Mainly we were talking about the recent acquisition of Invarian but he also brought me up to date on Silvaco and how he is bringing their disparate product lines into a more focused strategy.

See also Silvaco Swallows Invarian

Silvaco would be the first to admit … Read More


Sensing Without (much) Power

Sensing Without (much) Power
by Paul McLellan on 04-16-2015 at 7:00 am

Do you have one of those step-tracker things? They seem to be one of the earliest IoT devices that are actually selling in large quantities. Smartphones are also starting to contain this sort of sensor to provide similar functionality without requiring a separate device, as are smart-watches such as the Jumpy watch for kids on the… Read More


SoCs in New Context Look beyond PPA

SoCs in New Context Look beyond PPA
by Pawan Fangaria on 03-21-2015 at 7:00 am

If we look back in the last century, performance and area were two main criteria for semiconductor chip design. All design tools and flows were concentrated towards optimizing those two aspects. As a result, density of chips started increasing and power became a critical factor. Now, Power, Performance and Area (PPA) are looked… Read More


Getting a Grip on the Internet of Things

Getting a Grip on the Internet of Things
by Paul McLellan on 03-12-2015 at 7:00 am

QuickLogic’s CTO Tim Saxe gave a keynote Getting a Grip on the Internet of Things at the IoT Summit last week.

He started by relating how things have changed over the last 3 years when he talks to customers.

  • Three years ago it was sensor hubs in smartphones and the power budget was 3mW (so one day between re-charging, something
Read More

Innovus: Cadence’s Next Generation Implementation System

Innovus: Cadence’s Next Generation Implementation System
by Paul McLellan on 03-11-2015 at 7:00 am

Yesterday was the first day of CDNLive. There were three keynotes. The first was by Lip-Bu Tan, Cadence’s CEO (and the Chairman of Walden International that he will be the first to remind you). The most interesting tidbit was that Cadence now has over 1000 people working on IP and that it represents 11% of their revenue. Then… Read More


IP for IoT: Thanks for the Memory

IP for IoT: Thanks for the Memory
by Paul McLellan on 03-01-2015 at 4:57 pm

The Internet of Things (IoT) is clearly the buzzword of the moment, and like many catchy phrases it also tends to mean what you want it to mean, rolling up some things that exist like the automotive market or industrial automation, along with markets for things like wearables and healthcare that are largely in the future. But however… Read More


Analyzing Power Nets Early and Often, a New White Paper

Analyzing Power Nets Early and Often, a New White Paper
by Paul McLellan on 02-22-2015 at 7:00 am

One of the big challenges in designing ICs today is designing a robust power net capable of delivering necessary current levels to all areas of the die. Getting it wrong can, of course, lead to circuit failures that range from non-functional silicon, through intermittent performance and functional problems, to early EM-driven… Read More


Using NoCs to Reduce Power

Using NoCs to Reduce Power
by Paul McLellan on 02-11-2015 at 7:00 am

Earlier this week I moderated a webinar at Sonics entitled NoC 102: Using SonicsGN to Address Low Power Requirements. Drew Wingard, the CTO of Sonics, presented it. It goes without saying that power is a major concern in SoC design, not just with chips for battery powered devices but also tethered devices. A major cost of ownership… Read More