A Look at the PCIe Standard – the Silent Partner of Innovation

A Look at the PCIe Standard – the Silent Partner of Innovation
by Mike Gianfagna on 07-26-2022 at 6:00 am

A Look at the PCIe Standard – the Silent Partner of Innovation

Let’s face it. Standards aren’t always exciting, and the process of ratifying new versions can be time-consuming and tedious. Regardless, we all know standards are the glue that bind many ecosystems and without them the technology world would be good measure more chaotic. Standards come in many versions, with various amounts… Read More


Conquer SI/PI Challenges and Reduce Time to Signoff for PCIe 6.0

Conquer SI/PI Challenges and Reduce Time to Signoff for PCIe 6.0
by Admin on 05-19-2022 at 10:00 am

Overview

The Peripheral Component Interconnect Express (PCIe®) high-speed interface has become the standard for computer expansion cards due to its high bandwidth combined with manageable component costs. However, the latest PCIe 6.0 release raises new challenges for design engineers, as the popular interface standard… Read More


PCIe 6.0, LPDDR5, HBM2E and HBM3 Speed Adapters to FPGA Prototyping Solutions

PCIe 6.0, LPDDR5, HBM2E and HBM3 Speed Adapters to FPGA Prototyping Solutions
by Kalar Rajendiran on 12-15-2021 at 6:00 am

Avery PCIe Speed Adapter IP at Work

We live in the age of big data. No matter how fast and complex modern SoCs are, it all comes down to how quickly data can get in and out that determines the system performance. And, there is a lot of data that today’s systems need to process. Naturally, system interfaces such as PCIe, DDR, HBM, etc., have been evolving rapidly too, to support… Read More


WEBINAR: PCIe 6.0 From IP to Interconnect in High-Performance Computing

WEBINAR: PCIe 6.0 From IP to Interconnect in High-Performance Computing
by Daniel Nenni on 12-08-2021 at 10:00 am

ABSTRACT:

PCI Express (PCIe) is one of the most popular interface technologies in the world. Interconnects for high-performance computing (HPC) in the data center, cloud and AI edge continue to increase in speed and density. System architects, SoC designers, PCB developers and SI engineers are challenged as never before to … Read More


Webinar: The Backstory of PCIe 6.0 for HPC, From IP to Interconnect

Webinar: The Backstory of PCIe 6.0 for HPC, From IP to Interconnect
by Mike Gianfagna on 12-01-2021 at 8:00 am

The Backstory of PCIe 6.0 for HPC From IP to Interconnect

PCIe, or peripheral component interconnect express, is a very popular high-speed serial computer expansion bus standard. The width and speed the standard supports essentially defines the throughput for high-performance computing (HPC) applications.  The newest version, PCIe 6.0 promises to double the bandwidth that the… Read More


PCIe 6.0 Doubles Speed with New Modulation Technique

PCIe 6.0 Doubles Speed with New Modulation Technique
by Tom Simon on 04-26-2021 at 6:00 am

PCIe 6.0 Eye

PCI-SIG has held to doubling PCIe’s data rate with each revision of the specification. The consortium of 800 companies, with its board consisting of Agilent, AMD, Dell, HP, Intel, Synopsys, NVIDIA, and Qualcomm, is continuing this trend with the PCIe 6.0 specification which calls for a transfer rate of 64 GT/s. PCI-SIG released… Read More


How PCI Express 6.0 Can Enhance Bandwidth-Hungry High-Performance Computing SoCs

How PCI Express 6.0 Can Enhance Bandwidth-Hungry High-Performance Computing SoCs
by gruggles on 04-12-2021 at 2:00 pm

How PCI Express 6.0 Can Enhance Bandwidth Hungry High Performance Computing SoCs

What do genome sequencing, engineering modeling and simulation, and big data analytics have in common? They’re all bandwidth-hungry applications with complex data workloads. High-performance computing (HPC) systems deliver the parallel processing capabilities to generate detailed and valuable insights from these applications.

Read More