If you remember, when TI decided to exit the booming wireless segment in 2012, the company decided to re-focus their application processor product line (OMAP) initially developed for smartphone “to a broader market including industrial clients like carmakers”. Being a TI employee in the 90’s in south of France, where TI has started… Read More
Tag: noc
Enterprise SSD SOC’s Call for a Different Interconnect Approach
The move to SSD storage for enterprise use brings with it the need for difficult to design enterprise capable SSD controller SOC’s. The benefits of SSD in hyperscale data centers are clear. SSD’s offer higher reliability due to the elimination of moving parts. They have a smaller foot print, use less power and offer much better performance.… Read More
Submerging the Data Center
One of NetSpeed’s customers is a Tier-1 semiconductor company that develops some of the industry’s best performing and most complex system on chips (SoC) for the data center and cloud computing markets. To keep its leadership in the data center market, the company needs to produce best-in-class SoC solutions year after year. … Read More
How to Build a Deadlock-Free Multi-cores SoC?
We will precisely explain the meaning of deadlock in a modern, complex multi-core SoC. First, let’s take a look at the crash of the Air France 296, when a brand new Airbus A320 crashed during a demo flight on June 26, 1988. This Airbus 320, the first plane being completely automated, thanks to the FADEC flight system, was running a demo… Read More
Finding under- and over-designed NoC links
When it comes to predicting SoC performance in the early stages of development, most designers rely on simulation. For network-on-chip (NoC) design, two important factors suggest that simulation by itself may no longer be sufficient in delivering an optimized design.
The first factor is use cases. I think I’ve told the story … Read More
Why Gemini 2.0 is tailored for tomorrow’ SoC designs?
You probably have seen many times this graphic showing that the number of IP blocks has exploded, going from a few dozens in SoC designed in 65 nm to 120 if not more for last generation SoC targeting 16FF or 10FF. This graphic is very good at synthesizing the raw IP count, but it doesn’t tell you about another strong trend: more agents … Read More
How to Overcome NoC Validation Multiple Challenges?
NetSpeed has developed NocStudio, a front end optimization design tool helping architects to create SoC architecture bridging the gap with the back end, floor planning and place and route. At the chip level, NocStudio generates a cache-coherent Network-on-Chip (NoC) allowing interconnecting the various CPU, GPU or Acceleration… Read More
Why Modern SoC need cache-coherent NoC?
Launching high technology product on the semiconductor market after your competitors is not necessarily a weakness. NetSpeed has developed NocStudio, a front end optimization design tool helping architects to create SoC architecture bridging the gap with the back end, floor planning and place and route. Created about 20 years… Read More
NetSpeed NoC IP or Architectural Synthesis Company?
When you look at NetSpeed’s NocStudio design tool, you first think “I see, NetSpeed is a new Network-on-Chip (NoC) IP company”. Are you wrong? Yes and no… No because NocStudio indeed generates a NoC. Yes, because the company objectives are going much farther than simply deliver a new NoC solution. According with Sundari Mitra, … Read More
Opportunity NoCs, But Not Without Software
It is easy to think that semiconductor IP is all about structures on the silicon. After all, there is “semiconductor” in the phrase “semiconductor IP”. But increasingly the heart is actually software. Sonics’ SGN product is a network-on-chip but to build it you need to use the software that actually… Read More