Using NoCs to Reduce Power

Using NoCs to Reduce Power
by Paul McLellan on 02-11-2015 at 7:00 am

Earlier this week I moderated a webinar at Sonics entitled NoC 102: Using SonicsGN to Address Low Power Requirements. Drew Wingard, the CTO of Sonics, presented it. It goes without saying that power is a major concern in SoC design, not just with chips for battery powered devices but also tethered devices. A major cost of ownership… Read More


NoC 102: Using SonicsGN to Address Low Power Requirements From IoT to Servers

NoC 102: Using SonicsGN to Address Low Power Requirements From IoT to Servers
by Paul McLellan on 01-29-2015 at 7:00 am

At the end of last year, I moderated a Sonics webinar to introduce the concept of a network-on-chip or NoC. It was called NoC 101 and the replay is still available here.

Well it is a new year and time for chapter 2. I will be moderating a webinar next Wednesday February 4th at 10am pacific time. Once again the webinar itself will be delivered… Read More


Twelve Years of Sonics at Toshiba

Twelve Years of Sonics at Toshiba
by Paul McLellan on 01-13-2015 at 7:00 am

Sonics announced today that Toshiba has completed the SoC design using Sonics’ on-chip network IP for its new TZ2100 group of application processors. The TZ2100 group of applications processors are the newest addition to Toshiba’s ApP Lite (Application Processor Lite) TZ2000 series. With this group of ApP Lite devices, sound… Read More


ASIC Days Are Here Again

ASIC Days Are Here Again
by Paul McLellan on 12-18-2014 at 7:00 am

Technology often goes in cycles. Thirty years ago the dominant mode of computing was a shared computing resource with comparatively dumb terminals. Think of a Vax accessed by terminals. Then workstations and the PC came along and the dominant mode became a computer on everyone’s desk. Then the smartphone came along and … Read More


NoC IP boosts SoC reliability, fault tolerance

NoC IP boosts SoC reliability, fault tolerance
by Majeed Ahmad on 12-14-2014 at 7:00 pm

System-on-chip (SoC) devices are increasingly becoming more complex in terms of adding functionality yet they need to be more reliable and fault tolerant for automotive, aerospace and industrial electronics.

Arteris Inc.—which invented the network-on-chip (NoC) interconnect technology back in 2006—is now offering FlexNoC… Read More


NoC 101, a Sonics Webinar

NoC 101, a Sonics Webinar
by Paul McLellan on 11-13-2014 at 7:00 am

One of the things that I’ve been telling the people at Sonics when they will listen is that they should do a bit more basic education on Networks on Chip (NoC). Sure, the people who actually use Sonics’s products care about deep details such as security and power management, but there is a whole host of designers who have… Read More


How Sonics Uses Jasper Formal Verification

How Sonics Uses Jasper Formal Verification
by Paul McLellan on 11-11-2014 at 7:00 am

The Jasper part of Cadence announced jointly with Sonics a relationship whereby Sonics uses JasperGold Apps as part of their verification. I talked to Drew Wingard, the CTO, about how they use it.

One way is during the day when their design engineers use Jasper as part of their verification arsenal. Interestingly it is the design… Read More


Agile IC Development

Agile IC Development
by Paul McLellan on 10-01-2014 at 7:00 am

If you have been involved in software development you have probably heard of the “waterfall” development methodology. This is the approach whereby a complete specification of the software is developed before a single line of code is written. Nowadays, few people develop software that way since it is too slow. And… Read More


Improve Your Memory the Sonics Way

Improve Your Memory the Sonics Way
by Paul McLellan on 07-22-2014 at 7:00 am

There is never enough memory bandwidth. Well, occasionally there is but many SoCs have lots of blocks that communicate through memory, typically off-chip DRAM. In 2001 Sonics created their first solution to this problem with MemMax technology that was incorporated into their SonicsSX product. This has been used in over 100 designs… Read More


S-engine Moves up the Integration of IPs into SoCs

S-engine Moves up the Integration of IPs into SoCs
by Pawan Fangaria on 07-07-2014 at 8:30 am

As the semiconductor design community is seeing higher and higher levels of abstraction with standard IPs and other complex, customized IPs and sub-systems integrated together at the system level, sooner than later we will find SoCs to be just assemblies of numerous IPs selected off-the-self according to the design needs and… Read More