Making Cars Smarter And Safer

Making Cars Smarter And Safer
by Tom Simon on 04-18-2017 at 12:00 pm

The news media has naturally focused on the handful of deaths that have occurred while auto-pilot features have been enabled. In reality, automobile deaths are occurring at a lower rate now than ever. In 2014 the rate was 1.08 deaths per 100 million miles driven. Compare that to the 5.06 per 100M miles in 1960, or a whopping 24.09 in… Read More


Improved Timing Closure for Network-on-Chip based SOC’s

Improved Timing Closure for Network-on-Chip based SOC’s
by Tom Simon on 03-09-2017 at 12:00 pm

Network on chip (NoC) already has a long list of compelling reasons driving its use in large SOC designs. However, this week Arteris introduced their PIANO 2.0 software that provides an even more compelling reason to use their FlexNoC architecture. Let’s recap. Arteris FlexNoC gives SOC architects and designers a powerful tool… Read More


Automotive OEMs Get Boost as NetSpeed NoC is Certified ISO 26262 Ready

Automotive OEMs Get Boost as NetSpeed NoC is Certified ISO 26262 Ready
by Mitch Heins on 03-07-2017 at 12:00 pm


I read with great interest today news from NetSpeed Systems that both their Gemini and Orion NoC IPs have been certified ISO 26262 ASIL D ready. They were certified by SGS-TUV Saar GmbH, an independent accredited assessor. This is a big deal as up till now, it was left up to the OEMs to do most of the heavily lifting to qualify their IC’s… Read More


Timing Closure Complexity Mounts at FinFET Nodes

Timing Closure Complexity Mounts at FinFET Nodes
by Tom Simon on 01-27-2017 at 7:00 am

Timing closure is the perennial issue in digital IC design. While the specific problem that has needed to be solved to achieve timing closure over the decades has continuously changed, it has always been a looming problem. And the timing closure problem has gotten more severe with 16/14nm FinFET SoCs due to greater distances between… Read More


Netspeed Gemini NoC Provides Coherent Fabric in Mobileye’s Next-generation EyeQ5 SoC

Netspeed Gemini NoC Provides Coherent Fabric in Mobileye’s Next-generation EyeQ5 SoC
by Mitch Heins on 01-11-2017 at 7:00 am

Last week I wrote about NetSpeed’s network on chip (NoC) IP technology and design environment NocStudio. This week we see a real life application of this technology announced at CES by Imagination Technologies and NetSpeed. The companies have announced that Mobileye will use Imagination and NetSpeed IP in their next-generation… Read More


NetSpeed Bridges the Gap Between Architecture and Implementation

NetSpeed Bridges the Gap Between Architecture and Implementation
by Mitch Heins on 12-29-2016 at 11:30 am

This is part II of an article covering NetSpeed’s network-on-chip (NoC) offerings. This article dives a little deeper into what a NoC is and how NetSpeed’s network synthesis tool, NocStudio, helps system architects optimize a NoC for their system-on-a-chip (SoC) design.

Traditionally IC designers have used proprietary buses,… Read More


NetSpeed Leverages Machine Learning for Automotive IC End-to-End QoS Solutions

NetSpeed Leverages Machine Learning for Automotive IC End-to-End QoS Solutions
by Mitch Heins on 12-24-2016 at 4:00 pm

A couple of weeks back I wrote an article about the use of machine learning and deep neural networks in self-driving cars. Now I find that machine learning is also being applied to help build advanced end-to-end QoS (quality of service) solutions for the automotive IC market. With the advent of self-driving cars comes requirements… Read More


CEO Interview: Charlie Janac of Arteris

CEO Interview: Charlie Janac of Arteris
by Daniel Nenni on 10-17-2016 at 7:00 am

Charlie Janac ArterisIP

When Charlie Janac talks, people listen, absolutely. Charlie’s 30 year career spans EDA, IP, semiconductor equipment, nano-technology, and venture capital. For the last 11 years he has been CEO of interconnect IP provider Arteris who invented the industry’s first commercial network on chip (NoC) SoC interconnect IP… Read More


Cache Coherent Systems Get a Boost from New Technology

Cache Coherent Systems Get a Boost from New Technology
by Tom Simon on 05-20-2016 at 12:00 pm

The speed and power penalties for accessing system RAM affect everything from artificial intelligence platforms to IoT sensor nodes. There is a huge power and performance overhead when the various IP blocks in an SOC need to go to DRAM. Memory caches have become essential to SOC design to reduce these adverse effects. However, … Read More


Top Mobile OEM Uses NetSpeed to Boost Its Next Gen Application Processor

Top Mobile OEM Uses NetSpeed to Boost Its Next Gen Application Processor
by Eric Esteve on 04-20-2016 at 12:00 pm

The smartphone segment is certainly the most competitive market for chip makers today and the yearly product launch cadence puts a lot of pressure on the application processor design cycle. End-users expect to benefit from higher image definition, better sound quality, ever faster and more complex applications which push the… Read More