An Informal Update

An Informal Update
by Bernard Murphy on 10-05-2017 at 7:00 am

I mentioned back in June that Synopsys had launched a blog on formal verification, intended to demystify the field and provide help in understanding key concepts. It’s been a few months, time to check in on some of their more recent posts.


First up, it feels like they are finding their groove. Relaxed style, useful topics but now with… Read More


Prototyping GPUs, Step by Step

Prototyping GPUs, Step by Step
by Bernard Murphy on 08-15-2017 at 7:00 am

FPGA-based prototyping has provided a major advance in verification and validation for complex hardware/software systems but even its most fervent proponents would admit that setup is not exactly push-button. It’s not uncommon to hear of weeks to setup a prototype or of the prototype finally being ready after you tape-out. … Read More


S2C tutorial and PROTOTYPICAL debut at DAC

S2C tutorial and PROTOTYPICAL debut at DAC
by Don Dingee on 05-18-2016 at 4:00 pm

It’s been a busy few days here in Canyon Lake, and we’re ready to share exciting news in advance of #53DAC coming up on Monday, June 6[SUP]th[/SUP]. S2C is offering a technical program tutorial on “Overcoming the Challenges of FPGA Prototyping” followed by the launch of our latest book project, “PROTOTYPICAL”, including a field… Read More


Full-Custom Low Power Design Methodology

Full-Custom Low Power Design Methodology
by Daniel Payne on 05-19-2014 at 1:30 pm

Digital designers have used logic optimization and logic synthesis for decades as a means to produce more optimal designs with EDA tools. On the analog and transistor-level side of design the efforts to automatically optimize for speed or power have generally been limited to circuits with only a handful of transistors. These … Read More


Improving Methodology the NVIDIA Way

Improving Methodology the NVIDIA Way
by Paul McLellan on 01-29-2013 at 2:57 pm

I was at DesignCon in Santa Clara today and listened to Jonah Alben of NVIDIA’s keynote on what their approach is to improving design methodology. He started by pointing out that most companies underinvest in EDA (and he includes NVIDIA in this). Partially it is complaceny: that last chip taped out so we know we can do it again.… Read More