Tag: mentor
Tessent Visualizer – Increase your productivity with less time spent on DFT debug
Overview
Designed for billion-gate designs, Tessent Visualizer is helping DFT engineers be more productive by addressing key challenges of the most time-consuming
Addressing nm Mixed-Signal Verification Challenges with Symphony – Powered by the AFS Platform
Overview
In this session we provide an in-depth overview of Mentor’s recently launched Symphony Mixed-Signal Platform. Symphony is the industry’s fastest
Introduction to Visualizer for the VHDL Users
Register For This Web Seminar
Online – Jun 30, 2020
8:00 AM – 9:00 AM US/Pacific
8:00 AM – 9:00 AM US/Pacific
Overview
Complex testing and methodology with complex silicon require powerful but simple to use debug solutions. The Visualizer Debug Environment provides a common debug solution for simulation, emulation and other engines,
Complete RTL to GDSII Flow for “Analog on Top” Designs
Overview
Mentor will highlight our Tanner Digital Implementer (TDI) tool, powered by the Oasys Digital Synthesis and Nitro Place and Route engines, and
Accelerate Early Design Verification for faster Time to Market
Register For This Web Seminar
Online – Jun 25, 2020
11:00 – 12:00 IST
11:00 – 12:00 IST
Overview
Advanced nodes brings in complexity in designs leading to high Physical verification times with increasing number of DRC errors and more verification iterations. Calibre responds to the need for reduced cycle time with revolutionary
Valor Process Preparation Webinar – Process Prep Overview
Register For This Web Seminar
Online – Jun 25, 2020
11:00 AM – 11:30 AM US/Pacific
11:00 AM – 11:30 AM US/Pacific
Overview
Valor Process Preparation is the most complete solution for preparing manufacturing collateral on the market today. Learn about the latest released capability that has been delivered in the latest version as well
Tessent SiliconInsight ATE-Connect: Bending the bring up schedule curve in your favor
Register For This Web Seminar
Overview
With the number of IP blocks and complexity of designs increasing, how do you improve your TTM for debug of a test program to production? Teradyne
Addressing nm Mixed-Signal Verification Challenges with Symphony – Powered by the AFS Platform
Overview
In this session we provide an in-depth overview of Mentor’s recently launched Symphony Mixed-Signal Platform. Symphony is the industry’s fastest
Introduction to Visualizer for the VHDL Users
Register For This Web Seminar
Online – Jun 30, 2020
8:00 AM – 9:00 AM US/Pacific
8:00 AM – 9:00 AM US/Pacific
Overview
Complex testing and methodology with complex silicon require powerful but simple to use debug solutions. The Visualizer Debug Environment provides a common debug solution for simulation, emulation and other engines,