Life Without EUV: SPIE Day 2

Life Without EUV: SPIE Day 2
by Scotten Jones on 03-29-2015 at 11:00 pm

I previously published a summary of day 1 of SPIE and I wanted to follow up with observations from successive days.

SPIE, the international society for optics and photonics, was founded in 1955 to advance light-based technologies.Serving more than 256,000 constituents from approximately 155 countries, the not-for-profit Read More


Mapping Focus and Dose onto BEOL Fabrication Effects

Mapping Focus and Dose onto BEOL Fabrication Effects
by Tom Simon on 03-16-2015 at 7:00 pm

With today’s ArF based lithography using 193nm wavelength light, we are hard up against the limitations imposed by the Raleigh equation. Numerous clever things have been devised to maximize yield and reduce feature size. These include 2 beam lithography, multiple patterning, immersion litho processes to improve NA, thinner… Read More


What’s Hot at SPIE Advanced Lithography

What’s Hot at SPIE Advanced Lithography
by Beth Martin on 02-04-2015 at 10:00 pm

The 40[SUP]th[/SUP] SPIE Advanced Lithography conference will be at the San Jose Convention Center 22-26 February. Over the past few years, this conference has grown in scope to include emerging patterning technologies, like directed self-assembly (DSA) and design-process-technology co-optimization.

Underlying all … Read More


10nm, the View from IBM

10nm, the View from IBM
by Paul McLellan on 10-05-2014 at 7:01 am

On the Cadence booth at DAC, Lars Liebmann of IBM presented on the challenges of 10nm. As he put it, how the lithography folks are keeping things very interesting for the EDA tool development engineers. Although 14nm/16nm hasn’t yet ramped into HVM, the advanced work for tools and IP has all moved to 10nm. Although Lars gave… Read More


EUV Pellicles

EUV Pellicles
by Paul McLellan on 07-31-2014 at 8:01 am

Shakespeare reckoned that a man went through seven stages in his life.All the world’s a stage, And all the men and women merely players. They have their exits and their entrances, And one man in his time plays many parts, His acts being seven ages.

Well, an EUV mask seems to only go through three main stages:

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    EUV and DSA from Imec and #semiconwest

    EUV and DSA from Imec and #semiconwest
    by Paul McLellan on 07-14-2014 at 7:00 am

    All the details of how we will build semiconductors going forward depend on whether we have EUV in our arsenal or not. Imec is very close to this since they work closely with ASML (who are about an hour and half’s drive away just outside Eindhoven in the Netherlands). At the imec technology symposium we were given a quick summary… Read More


    Imec’s Process Secret Decoder Ring

    Imec’s Process Secret Decoder Ring
    by Paul McLellan on 07-12-2014 at 11:00 am

    To wrap up Semicon West, let’s go back to Monday and the imec presentations. In fact, An Steegen’s presentation titled The Semiconductor Roadmap. She covered a lot of ground, but some of her slides contain a wealth of information. Let’s look at the options for 10nm, 7nm and a little 5nm, what imec call N10, N7 and… Read More


    Cliff Hou’s DAC Keynote

    Cliff Hou’s DAC Keynote
    by Paul McLellan on 06-23-2014 at 10:21 am

    Cliff Hou had two major appearances at DAC this year. He gave the opening day keynote…and he wrote the forward to Dan and my bookFabless: the Transformation of the Semiconductor Industry which about 1500 lucky people got a copy of courtesy of several companies, most notably eSilicon who sponsored the Tuesday evening post-conference… Read More


    EUV Will Never Happen

    EUV Will Never Happen
    by Paul McLellan on 05-23-2014 at 9:21 pm

    ASML SMIC TSMC EUV DUV

    I had lunch today with a guy who has to remain nameless. But he is on the edge of the semiconductor lithography thing. He told me EUV will never happen. Of course lots of people have said that. Me for one. But he said everyone knows it. The investment community, the foundries, everyone. Intel put money into ASML in the hopes that it would… Read More


    New Method for Metrology with sub-10 nm Lithrography

    New Method for Metrology with sub-10 nm Lithrography
    by Daniel Nenni on 05-06-2014 at 6:00 pm

    NewPath Research will describe their new method for nanoscale carrier profiling in semiconductors on May 19[SUP]th[/SUP] at the Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC) in Saratoga Springs, NY. This new method is intended to fill the gap that has been addressed in the Roadmaps for the semiconductor… Read More