Lithography For Advanced Packaging Equipment

Lithography For Advanced Packaging Equipment
by Robert Castellano on 06-24-2019 at 10:00 am

Advanced IC packaging, such as fan-out WLP (Wafer Level Packaging) and 2.5D TSV (Through Silicon Via) will drive the packaging equipment market, particularly lithography. This will help specific equipment manufacturers in 2019, since the WFE (Wafer Front End) market will drop 17%. But the Back-End lithography market, led … Read More


imec and Cadence on 3nm

imec and Cadence on 3nm
by Daniel Nenni on 04-30-2018 at 7:00 am

Image RemovedOne of the more frequent questions I get, “What is next after FinFETs?” is finally getting answered. Thankfully I am surrounded by experts in the process technology field including Scotten Jones of IC Knowledge. I am also surrounded by design enablement experts so I really am the man in the middle which brings us to … Read More


SPIE Advanced Lithography and Synopsys!

SPIE Advanced Lithography and Synopsys!
by Daniel Nenni on 02-01-2017 at 7:00 am

SPIE is the premier event for lithography held in Silicon Valley and again Scotten Jones and I will be attending. EUV is generally the star of the show and this year will be no different now that TSMC has committed to EUV production in 2019.

Last year at SPIE, TSMC presented the history of EUV development from the beginning in 1985 as … Read More


Mentor’s Battle of the Photonic Bulge

Mentor’s Battle of the Photonic Bulge
by Mitch Heins on 12-07-2016 at 4:00 pm

Image RemovedA few weeks back I wrote an article mentioning that Mentor Graphics has been quietly working on solutions for photonic integrated circuits (PICs) for some time now, while one of their competitors has recently established a photonics beachhead. One of the most common challenges for PIC designs is their curvilinear… Read More


Layout Pattern Matching for DRC, DFM, and Yield Improvement

Layout Pattern Matching for DRC, DFM, and Yield Improvement
by Tom Dillinger on 06-01-2016 at 12:00 pm

It is truly amazing to consider the advances in microelectronic process development, using 193i photolithography. The figure below is a stark reminder of the difference between the illuminating wavelength and the final imaged geometries. This technology evolution has been enabled by continued investment in mask data generation… Read More


The Semicon Industry Keeps Wafer Fabs Moving Up

The Semicon Industry Keeps Wafer Fabs Moving Up
by Pawan Fangaria on 04-20-2016 at 7:00 am

The worldwide revenue of semiconductor industry has remained flat in last few years; to be more precise, overall semiconductor revenue declined by 1.9% in 2015 and Gartner forecasts it to further decline by 0.6% in 2016. The total revenue was at record high of $340.3 billion in 2014.

Well, semiconductor industry has matured. A … Read More


Life Without EUV: SPIE Day 2

Life Without EUV: SPIE Day 2
by Scotten Jones on 03-29-2015 at 11:00 pm

I previously published a summary of day 1 of SPIE and I wanted to follow up with observations from successive days.

SPIE, the international society for optics and photonics, was founded in 1955 to advance light-based technologies.Serving more than 256,000 constituents from approximately 155 countries, the not-for-profit Read More


Mapping Focus and Dose onto BEOL Fabrication Effects

Mapping Focus and Dose onto BEOL Fabrication Effects
by Tom Simon on 03-16-2015 at 7:00 pm

With today’s ArF based lithography using 193nm wavelength light, we are hard up against the limitations imposed by the Raleigh equation. Numerous clever things have been devised to maximize yield and reduce feature size. These include 2 beam lithography, multiple patterning, immersion litho processes to improve NA, thinner… Read More


What’s Hot at SPIE Advanced Lithography

What’s Hot at SPIE Advanced Lithography
by Beth Martin on 02-04-2015 at 10:00 pm

Image RemovedThe 40[SUP]th[/SUP] SPIE Advanced Lithography conference will be at the San Jose Convention Center 22-26 February. Over the past few years, this conference has grown in scope to include emerging patterning technologies, like directed self-assembly (DSA) and design-process-technology co-optimization.

Underlying… Read More