In December 2023, we published the Intel Revenue forecast for external wafer sales, gave a breakdown on how customers plan to ramp the foundry. The forecast is still valid (it assumes Intel executes on all plans) but since then we have a better understanding of Intel’s strategy and scenarios that could unfold.
The scenarios… Read More
In the dynamic realm of technological innovation, collaborations and partnerships often serve as catalysts for groundbreaking advancements. Continuing along this trajectory, Ansys, a global leader in engineering simulation software, has forged a partnership with Intel Foundry to enable multiphysics chip design. The … Read More
On Wednesday, February 21st Intel held their first Foundry Direct Connect event. The event had both public and NDA sessions, and I was in both. In this article I will summarize what I learned (that is not covered by NDA) about Intel’s business, process, and wafer fab plans (my focus is process technology and wafer fabs).
For the 2024 SEMI International Strategy Symposium I was challenged by members of the organizing committee to look at where logic will be in ten years from a technology, economics, and sustainability perspective. The following is a discussion of my presentation.
To understand logic, I believe it is useful to understand what makes… Read More
There are trillions of dollars at stake with AI and huge geopolitical consequences. However, the weak foundation to American technological power is their dependence on Taiwan and TSMC, which is where most advanced silicon is manufactured. America has also been taking China to the ropes lately in their economic/technology proxy… Read More
Dan is joined by Paul Fischer. Paul is the director of Chip Mesoscale Processing in Intel’s Components Research. He and his team are currently working on Gallium Nitride for energy efficient power delivery and RF communications, and technologies for heterogeneous monolithic integration.
Paul discusses the innovations… Read More
At IEDM 2023, Naoto Horiguchi presented on CFETs and Middle of Line integration. I had a chance to speak with Naoto about this work and this write up is based on his presentation at IEDM and our follow up discussion. I always enjoy talking to Naoto, he is one of the leaders in logic technology development, explains the technology in … Read More
Chiplets (die stacking) is not new. The origins are deeply rooted in the semiconductor industry and represent a modular approach to designing and manufacturing integrated circuits. The concept of chiplets has been energized as a response to the recent challenges posed by the increasing complexity of semiconductor design. … Read More
The annual International Electron Devices Meeting (IEDM) took place last month. One of the presentations on the short course was by Matthew Metz of Intel titled New Materials Systems for Moore’s Law Continuation. In essence this was a look at some of the possibilities for what comes after silicon runs out of steam.
Matthew started… Read More
For the first time ever, IEDM held a sustainability session at the 2023 conference. I was one of the authors who presented an invited paper, the following is a summary of my presentation.
From the United Nations [1]:
“Climate Change is the defining issue of our time, and we are at a defining moment.”
“Without drastic … Read More
