IEDM 2022 – Imec 4 Track Cell

IEDM 2022 – Imec 4 Track Cell
by Scotten Jones on 01-18-2023 at 6:00 am

2022 IEDM Presentation Session23 2 VictorVega Page 03

At the IEDM conference in December 2022, Imec presented “Semi-damascene Integration of a 2-layer MOL VHV Scaling Booster to Enable 4-track Standard Cells,” I had a chance to not only read the paper and see it presented, but also to interview one of the authors Zsolt Tokie.

Logic designs are built up by standard cells such as inverters,… Read More


IEDM 2022 – TSMC 3nm

IEDM 2022 – TSMC 3nm
by Scotten Jones on 01-02-2023 at 6:00 am

TSMC CPP

TSMC presented two papers on 3nm at the 2022 IEDM; “Critical Process features Enabling Aggressive Contacted Gate Pitch Scaling for 3nm CMOS Technology and Beyond” and “A 3nm CMOS FinFlexTM Platform Technology with Enhanced Power Efficiency and Performance for Mobile SOC and High Performance Computing Applications”.

When … Read More


SEMICON West 2022 and the Imec Roadmap

SEMICON West 2022 and the Imec Roadmap
by Scotten Jones on 08-03-2022 at 10:00 am

ITFUSA2022 LucVandenhove Page 093

SEMICON West 2022 was held from July 12th to 14th at the Moscone Center in San Francisco.

On Monday the 11th before the show, Imec held a technology forum at the Marriott Marquee right around the corner from the Moscone center. In recent years the Imec forums have shifted away from the process technology I cover to more of a system and… Read More


Intel 2022 Investor Meeting

Intel 2022 Investor Meeting
by Scotten Jones on 02-21-2022 at 6:00 am

Figure 1 Process Innovations

Last Thursday Intel held their investors meeting, in this write up I wanted to focus on my areas of coverage/expertise, process technology and manufacturing.

Technology Development presented by Ann Kelleher

Last year Intel presented their Intel Accelerated plan and, in this meeting, we got a review of where Intel stands on that… Read More


IBM at IEDM

IBM at IEDM
by Scotten Jones on 01-10-2022 at 6:00 am

Vertical FET process

IBM transferred their semiconductor manufacturing to GLOBALFOUNDRIES several years ago but still maintains a multibillion-dollar research facility at Albany Nanotech. IBM is very active at conferences such as IEDM and appears to have a good public relations department because they get a lot of press.

At the Litho Workshop … Read More


Intel Discusses Scaling Innovations at IEDM

Intel Discusses Scaling Innovations at IEDM
by Scotten Jones on 12-14-2021 at 6:00 am

Intel at IEDM Slides Page 1

Standard Cell Scaling

Complex logic designs are built up from standard cells, in order to continue to scale logic we need to continually shrink the size of standard cells.

Figure 1 illustrates the dimensions of a standard cell.

 Figure 1. Standard Cell Dimensions.

 From figure 1 we can see that shrinking standard cell sizes requires… Read More


SISPAD – Cost Simulations to Enable PPAC Aware Technology Development

SISPAD – Cost Simulations to Enable PPAC Aware Technology Development
by Scotten Jones on 10-31-2021 at 10:00 am

Slide11

I was invited to give a plenary address at the SISPAD conference in September 2021. For anyone not familiar with SISPAD it is a premiere TCAD conference. This year for the first time SISPAD wanted to address cost and my talk was “Cost Simulations to Enable PPAC Aware Technology Development”.

For many years the standard in technology… Read More


VLSI Symposium – TSMC and Imec on Advanced Process and Devices Technology Toward 2nm

VLSI Symposium – TSMC and Imec on Advanced Process and Devices Technology Toward 2nm
by Scotten Jones on 07-02-2021 at 6:00 am

Figure 1

At the 2021 Symposium on VLSI Technology and Circuits in June a short course was held on “Advanced Process and Devices Technology Toward 2nm-CMOS and Emerging Memory”. In this article I will review the first two presentations covering leading edge logic devices. The two presentations are complementary and provide and excellent… Read More


ISS 2021 – Scotten W. Jones – Logic Leadership in the PPAC era

ISS 2021 – Scotten W. Jones – Logic Leadership in the PPAC era
by Scotten Jones on 01-15-2021 at 6:00 am

Slide3

I was asked to give a talk at the 2021 ISS conference and the following is a write up of the talk.

The title of the talk is “Logic Leadership in the PPAC era”.

The talk is broken up into three main sections:

  1. Background information explaining PPAC and Standard Cells.
  2. A node-by-node comparisons of companies running leading edge logic
Read More

VLSI Symposium 2020 – Imec Monolithic CFET

VLSI Symposium 2020 – Imec Monolithic CFET
by Scotten Jones on 09-13-2020 at 10:00 am

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The 2020 VLSI Technology Symposium was held as a virtual conference from June 14th through June 19th. At the symposium Imec gave an interesting paper on Monolithic CFET and I had a chance to interview one of the authors, Hiroaki Arimura.

It is well known in the industry that FinFETs (FF) are reaching the end of their scaling life. Samsung… Read More