IC design at 20nm with TSMC and Synopsys

IC design at 20nm with TSMC and Synopsys
by Daniel Payne on 05-02-2012 at 10:25 am

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While the debate rages on about 28nm yield at foundry juggernaut TSMC, on Monday I attended a webinar on 20nm IC design hosted by TSMC and Synopsys. Double Patterning Technology (DPT) becomes a requirement for several layers of your 20nm IC design which then impact many of your EDA tools and methodology.… Read More


ARM Models: Carbon Inside

ARM Models: Carbon Inside
by Paul McLellan on 05-01-2012 at 10:00 pm

ARM used to build their own models. By hand. They had an instruction-set simulator (ISS) called ARMulator that was largely intended for software development, and cycle-accurate models that were intended to run within digital simulators for development of the hardware of ARM-based systems.

There were two problems with this … Read More


Keeping Moore’s Law Alive

Keeping Moore’s Law Alive
by Paul McLellan on 04-27-2012 at 12:37 pm

At the GSA silicon summit yesterday the first keynote was by Subramanian Iyer of IBM on Keeping Moore’s Law Alive. He started off by asking the question “Is Moore’s Law in trouble?” and answered with an equivocal “maybe.”

Like some of the other speakers during the day, he pointed out that … Read More


Introduction to FinFET technology Part II

Introduction to FinFET technology Part II
by Tom Dillinger on 04-27-2012 at 9:00 am

The previous post in this series provided an overview of FinFET devices. This article will briefly cover FinFET fabrication.

The major process steps in fabricating silicon fins are shown in Figures 1 through 3. The step that defines the fin thickness uses Sidewall Image Transfer (SIT). Low-pressure chemical vapor (isotropic)… Read More


Kadenz Leben: CDNLive! EMEA

Kadenz Leben: CDNLive! EMEA
by Paul McLellan on 04-27-2012 at 2:01 am

If you are in Europe then the CDNLive! EMEA user conference is in Munich at the Dolce Hotel from May 14th to 16th. Like last month’s CDNLive! in Cadence’s hometown San Jose, the conference focuses on sharing fresh ideas and best practices for all aspects of semiconductor design from embedded software down to bare silicon.… Read More


Do you need more machines? Licenses? How can you find out?

Do you need more machines? Licenses? How can you find out?
by Paul McLellan on 04-26-2012 at 9:00 pm

Do you need more servers? Do you need more licenses? If you are kicking off a verification run of 10,000 jobs on 1,000 server cores then you are short of 9000 cores and 9000 licenses, but you’d be insane to rush out with a purchase order just on that basis. Maybe verification isn’t even on the critical path for your design,… Read More


Mergers and Acquisitions in EDA should spark Innovation and Start ups

Mergers and Acquisitions in EDA should spark Innovation and Start ups
by Rich Goldstein on 04-23-2012 at 8:13 pm

With the recent closure of the Synopsys Magma deal and the economy showing a bit of uptick and some positive outlook compared to the last 3-4 years, I believe it’s time for some of the creative minds that find themselves looking for new opportunity to consider starting their own point tool as well as IP companies.

Many of these people… Read More


DAC 2012 Must-See! Hogan’s Heros: Learning from Apple

DAC 2012 Must-See! Hogan’s Heros: Learning from Apple
by Holly Stump on 04-23-2012 at 6:30 pm


Who doesn’t love the perennial Hogan’s Heros panel at DAC? Always provocative and illuminating, for technologists, entrepreneurs, and strategists.

At DAC 2012, Jim Hogan’s panel is “Learning from Apple”:Apple. We admire their devices, worship their creators and praisetheir stock in our portfolios. Apple is synonymous withRead More


Flexible ASIC Strategy!

Flexible ASIC Strategy!
by Daniel Nenni on 04-21-2012 at 9:00 pm

During my last Taiwan trip I also spent time with Global Unichip. Clearly, in order for the semiconductor industry to thrive we must enable design starts. With the rising costs and complexity of semiconductor design and manufacturing this is a much greater challenge which is why I’m so interested in GUC, for the greater good of the… Read More


Introduction to FinFET technology Part I

Introduction to FinFET technology Part I
by Tom Dillinger on 04-18-2012 at 6:00 pm

This is the first of a multi-part series, to introduce FinFET technology to SemiWiki readers. These articles will highlight the technology’s key characteristics, and describe some of the advantages, disadvantages, and challenges associated with this transition. Topics in this series will include FinFET fabrication,Read More