Most people think that designing successful high speed analog circuits requires a mixture of magic, skill and lots of hard work. While this might be true, in reality it also requires a large dose of collaboration among each of the members of the design, tool and fabrication panoply. This point was recently made abundantly clear … Read More
My IC design career started out with DRAM design, characterization and verification back in the 1970’s, so I vividly recall how much SPICE circuit simulation was involved, and how little automation we had back in the day, so we tended to cobble together our own scripts to help automate the process a bit. With each new process… Read More
Configurable analog IP has traditionally been a tough nut to crack. Digital IP, of course, now provides for wide configurability for varying applications. In the same way that analog design has remained less deterministic as compared to digital design, analog IP has also tended to be less flexible. However, the tide may be turning… Read More
By Fred Allibert
The IEEE S3S Conference (10-13 October 2016 at the San Francisco Airport Hyatt Regency) brings together 3 key technologies that will play a major role in tomorrow’s industry: SOI, 3D integration, and Subthreshold Microelectronics. The numerous degrees of freedom they allow enable the ultra-low power operation… Read More
At the #53DAC earlier this month held in Austin, Texas I met up with Renee Donkers, the founder of Fractal Technologies. His company has been focused on improving the quality of semiconductor IP cells through the use of automated checking software. The highest area of growth in EDA as measured by the ESD Alliance is in the reusable… Read More
If you’re in the chip biz in Silicon Valley, check out the SOI Consortium FD-SOI Symposium on April 13th in San Jose. They’ve been running these things since 2009, and I have to say that this one is the most comprehensive to date. Headliners include Cisco, Sony, NXP, SigmaDesigns, ARM, Ciena plus the big FD-SOI foundries,… Read More
A little over a month into 2016 and we already have a raft of FD-SOI news from Samsung, GlobalFoundries, NXP/Freescale, Renesas and more. Quite a bit of it came out of the recent SOI Consortium forum in Tokyo. Many of the presentations are now available on the SOI Consortium website (click here to see what’s there) – but keep checking… Read More
Antun Domic is the GM of the Design Group at Synopsys. I sat down with him a couple of weeks ago.
His name is Croatian although, of course, there was no Croatia back then it was part of Yugoslavia. But in fact he grew up in Chile and went to university there where he studied EE and math. He came to the US as a grad student and did a PhD at MIT in … Read More
When the term wearables is mentioned most people’s first thoughts go to devices like the Apple Watch, Fitbit Flex, or Nike Fuel Band. Wearables such as these solve first-world problems like how much exercise am I getting, or what is my heart rate. The developed world drives the development of new technology in most cases, and wearables… Read More
One task that is not very exciting but is critical is that of library quality assurance. Many design groups have created their own procedures, often having been burned in the past, to ensure that the libraries that they use are good. Failure to do so has resulted in:… Read More
